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DRV8889-Q1: The existing purpose of the VCP PIN of the DRV8889-Q1

Part Number: DRV8889-Q1

Hi !

I am currently designing the DRV8889-Q1 in out application.

I don't understand the topology of the below blockdiagram.

Below picture, I think that the capacitor between the CPH and CPL acts as boosting up to control the high side gate driver like VCP.

So, without the VCP pin, the CPH pin can control the high side gate driver and don't need the vcp pin.

please explain the topology the below blockdiagram.

thank you so much

• Jeongho,

When low side FET is on, CPH/CPL capacitor is charged up.

When high side FET is on, the CPH/CPL capacitor is connected to the VCP capacitor through high side FET and the diode between CPH and VCP. So,  the CPH/CPL capacitor charges the VCP capacitor.

After the VCP capacitor is charged up, it can be used to drive the internal high side power FET.

• Thank u so much for ur quick reply and I understand ur explanation.

I have to understand the principle totally to measure the DC characteristic of the all pins.

So expanding ur explanation, there are some questions to u.

1. After the VCP capacitor is charged up, is the voltage level of the VCP constant?

I think the diode between the VCP and CPH can not make the current flow from the CPH to VCP.

Because it is not satisfied with the condition of flowing the current. ( the condition of  flowing current : CPH > VCP )

And the constant level of the VCP can be assumed 3VM - 2diode according to the upper blockdiagram.

2.  After the VCP capacitor is charged up, it can always control to drive the internal high side power FET?

Because, VCP always supplys the power to the high side gate driver at proper level.

Is it right?

3.  The pin level of the VCP is constant.

The pin level of the CPH and CPL is switch ( CPL : GND or VM , CPH : VM - Diode or 2VM - Diode )

Is it right?

Thank u again for considering my questions.

Take care.

• Jeongho,

1. After the VCP capacitor is charged up, the voltage level of the VCP is constant.

2. 3.