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DRV8705-Q1: Deadtime value for HW device

Part Number: DRV8705-Q1

Hi team, 

Could you tell me which parameter in "Figure 9. TDRIVE State Machine" is correspond to HW deadtime; tDEAD?

Datasheet says "Internal handshake dead-time" means "VGSx_L/VGSx_H falling 10% to VGSx_H/VGSx_L rising 10%". 
Does it mean that "tDEAD_D" in "Figure 9. TDRIVE State Machine" is corresponding to tDEAD for HW device?

In addition, does it make sure that DRV8705-Q1 prevents shoot-through condition completely? 

Regards,
Ochi

  • Ochi-san,

    Yes. "tDEAD_D" in "Figure 9. TDRIVE State Machine" is corresponding to tDEAD. "VGSx_L/VGSx_H falling 10% to VGSx_H/VGSx_L rising 10%" gives the measurement method.

    1. DRV8705-Q1 is a gate driver device, please make sure that the external gate drive path does not make the high side FET on/off and low side FET off/on delay mismatch time longer than tDEAD. In general, this should be easy if we don't put a high resistance and capacitance in front of the FET's gate.

    2. FET's Cgd couple effect. This is a general concept for all buck converter. If the switching node voltage change to fast, the FET's gate could be coupled a voltage through its Cgd. If the gate voltage threshold is too low, the FET could be false turn-on and make the shoot through. We have to check the switching waveform to make sure the gate drive waveform is clean.

  • Hi Wang,

    Thank you so much. 
    I understood how tDEAD is inserted. In addition, we need to be careful about external gate driving circuit's parameters and FET's Cgd couple effect.

    Regards,
    Ochi