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DRV8702-Q1: Gate Driver Malfunction (Follow up)

Part Number: DRV8702-Q1

I see that my original question thread has been closed.  The last update I received was that a test setup was still being built up at TI.  Was that test setup ever completed?  Were you able to reproduce the malfunctioning gate drive behavior I demonstrated in my thread "Gate Driver Malfunction"?

I have tried all recommended actions and still have not been able to fix the behavior.  I determined that disabling my PWM soft start made the malfunction much less likely to occur, but that was more of a band-aid solution.  I had another unit come back from the customer with a failed Q1 again, and that reminded me to check in on the status of this thread.  Without doing a complete PCB redesign, I cannot think of any other experiments to do to fix this problem.

  • Hi Robert,

    Wasn't able to replicate your specific issue.  I think there is an issue with the layout.

    Were you able to test any of the final suggestions to rule out gate ringing?

    Regards,
    Mike

  • Michael Erdahl said:

    Hi Robert,

    Wasn't able to replicate your specific issue.  I think there is an issue with the layout.

    Were you able to test any of the final suggestions to rule out gate ringing?

    Regards,
    Mike

    None of the final suggestions seem to change things a significant degree.  As of right now, placing a grounded shield over the DRV8702 seems to have solved the issue.  Besides the decoupling capacitor suggestion, did anything else in the layout look suspect to causing issues?  It could be that our compact board layout is making the DRV8702 more susceptible to the flux from the motor wires.  All of your eval boards have the DRV8702 far away from the motor connections, potentially with inner ground layers.  We only have a two layer board (3oz copper) with all the high current traces on the top side and ground on the bottom.  We are going to redesign the board with a few tweaks including the capacitor recommendations as well as an EMI shield over the IC.  Any other suggestions would be helpful!

    -Robert

  • Hi Robert,

    Yes, our EVMs are 4-layers with a GND plane directly under the top layer.

    The key is going to be reducing loop areas on your high-current paths and bypass caps.  I am not an EMI expert, but from what I have been able to research on the topic, one possible reason the shielding is working on your board is because there are potentially some large (relatively speaking of course) loop areas for the EMI to couple.

    BTW, you mentioned twisting the cabling supplying the motor - is this also shielded?

    Edit: I found this set of slides that may contain some helpful information: https://www.ti.com/lit/ml/slyp697/slyp697.pdf

    Regards,
    Mike

    https://www.ti.com/lit/ml/slyp697/slyp697.pdf