DRV8353: Angular gate drive waveform, why?

Hi Alcor,

Thanks for your question! I agree that this waveform seems wrong.

Can you share your schematic file?

Is this occurring on one board & DRV8353 or multiple boards?

I assume that you using the SPI  variant of the DRV8353, as you mentioned changing the deglitch time. Can you confirm the register contents for addresses 3h and 4h?

Thanks,

Matt

Hi Matt,

It's happening on multiple boards. Yes, we're using the SPI variant. Register contents for 3h and 4h are 0x1B32 and 0x2732 respectively. Here's the schematic of the motor driver:

Please ignore the gate pulldown resistors. We don't have those populated.

The picture didn't go through. Trying again: 

The picture didn't go through. Trying again: 

Hi Alcor,

I can see that there is a GND difference between the MOSFETs and the DRV8353. How and where are the grounds connected? Have you measured the voltage on pin 39 during low-side MOSFET turn-on?

Thanks,

Matt

We join ground and PGND as such:

Pin 39 is in the bottom left, circled. The ground connection is in the top through a 0 ohm jumper. The grounds look identical on the scope.

Just to add more data, here are pictures of the 3 low-side gate signals. Dark blue = A, pink = C, light blue = B. Charge is the funky shaped one, discharge is clean. 

Last, an image of the capacitor voltage attached to VGLS during one of these transitions.

We also saw the gate voltage on the high side, which I recall is supposed to be something like 10.5V above the source, at around 8V.

Does any of this help?

Hi Alcor,

Can you also check the voltage at VGLS? I see that VGLS is referenced to the other ground (not PGND). This is where the voltage to supply the low-side gate is sourced from.

Thanks,

Matt

VGLS is at the very bottom of those images. It's something like 12-15V it looks like? It sags a bit during charge, which is something I'm concerned about. Is that normal?

Hi Alcor,

VGLS drop only looks like only a few volts, which would not be too concerning to me. We do expect some droop on VGLS when the gate turns on due to the load to charge the FET gate.

Can you check if the issue is still present when you are driving a very small current into the motor: <1A? We can see if it is a function of motor current.

If there is significant inductance (long trace length) in the path outlined in the image below, it may result in a very slow gate drive.

Side note: CPL-CPH capacitor should have the same rating as VM capacitors - 100V. With a 50V rating you are weakening the charge pump

Thanks,

Matt

Hi Alcor,

Great to hear! clamping diodes will definitely prevent the output from switching nicely!

Thanks,

Matt