Motor drivers forum - Recent Threads

MCT8316Z: OTW status bit (STATUS_1 bit 7) never sets - device goes straight to OTS (0x40), even with OTW_REP=1

Cedric Caparas — Thu, 16 Jul 2026 18:59:26 GMT

Part Number: MCT8316Z

We're using the MCT8316Z. We poll STATUS_1 over SPI every 50 ms to monitor the over-temperature warning (OTW, bit 7) so we can shed motor load before thermal shutdown.

Issue: Across many thermal tests we have never observed OTW = 1 but the device clearly reaches OTS: outputs shut down, the buck drops (our MCU browns out), and after recovery STATUS_1 reads 0x40 (OTS latched, OTW clear).

What we've tried/verified:

Wrote CONTROL_3 = 0x47 (OTW_REP = 1), expecting the OTW bit to latch per the datasheet. After the thermal event, STATUS_1 still reads only 0x40.
SPI comms are validated: register writes are accepted, and status reads return consistent values.
Post-event register dump: STATUS = 0x0A (OT + NPOR), STATUS_1 = 0x40, STATUS_2 = 0x80 - note STATUS_2 bit 7 is documented reserved-0 but consistently reads 1.

RE: MCT8316Z: OTW status bit (STATUS_1 bit 7) never sets - device goes straight to OTS (0x40), even with OTW_REP=1

Venkatadri Shantaram84961 — Fri, 24 Jul 2026 05:00:46 GMT

Hi Cedric,

Thanks for providing details, I will look into this and respond by today.

Thanks and best regards,

Venkatadri S

MCF8329HS: Question about maximum output current

Chase Jeong — Fri, 24 Jul 2026 04:52:59 GMT

Part Number: MCF8329HS

Dear TI experts,

Can MCF8329HS control 24V, 70A BLDC motor?

The application is drone.

And, can MCF8329HS support Dshot protocol for drone?

Best regards,

Chase

LMG2100R044: TIDA-010936(LMG2100 GaN) — does the DC-bus shunt + INA310A protect against hard short-circuit?

Pham Van Cong — Thu, 23 Jul 2026 01:08:29 GMT

Part Number: LMG2100R044

Hello TI team,

In the TIDA-010936 reference design, the 1mohm DC-bus shunt feeding the INA310A is placed before the bulk caps (VDC - shunt - 60µF - half-bridges).

My questions on hard short-circuit / shoot-through protection:

Since the peak fault current is supplied by the local bulk caps (not the upstream source), the shunt sits before the caps and would only sense the source recharge current — so it seems it does not capture the actual peak current through the FETs. Is that correct?
The INA310A delay is ~1us, but a shoot-through can reach destructive current within tens of ns (and a cable short within ~1-2us). Is 1us fast enough to protect the LMG2100R044 within its SOA/thermal limits?
Should I understand this shunt + INA310A path is intended for overcurrent/overload only, with hard shoot-through handled by the LMG2100's integrated interlock + dead-time (prevention, not detection)?
Has TI actually bench-tested this design against a real hard short / shoot-through (device survival, time-to-trip)? Is that documented anywhere?Thanks.

RE: LMG2100R044: TIDA-010936(LMG2100 GaN) — does the DC-bus shunt + INA310A protect against hard short-circuit?

Pham Van Cong — Thu, 23 Jul 2026 23:58:07 GMT

Hi EL,

Thanks — that confirms my main concern about R1.

Two follow-ups:

Regarding R18/R26/R39 — are these in-line phase shunts , right ? If in-line, they would not see shoot-through current at all, since that path is bus → high FET → low FET → ground and never reaches the motor phase.The LMG2100 datasheet states the device does not implement overlap protection
Still open: has TIDA-010936 been bench-tested against a real hard short / shoot-through, with measured time-to-trip? If TI hasn't run that test, that's a useful answer too — I just need to know so I can budget my own protection.

Thanks.

DRV2605L: Treatment under fault condition

Ryuuichi machida — Thu, 16 Jul 2026 12:28:53 GMT

Part Number: DRV2605L

Hi,

I would like to confirm about below.

Q1
How user can recover from thermal shutdown ?
According to datasheet, if thermal of device exceed thermal threshold, "OVER_TEMP" bit will be asseerted.
When I read description of this bitfield, when user read this bit, this bit will be cleared automatically.
Here is my understanding when thermal shutdown is occured, however, could you confirm whether my understanding is correct or not?

1. It seems that there is no interruption about thermal shutdown, so user need to perform polling against "OVER_TEMP" bit.
2. If device temperature is less than thernal threshold, after reading "OVER_TEMP" bit, device operation will return to normal operation. (If thermal of device still exceed thermal threshold, "OVER_TEMP" bit will be asserted again.)
3. In that case, user do not perform "initialization" (including auto calibration).

Q2,
How user can recover from over current protection ?
According to datasheet, when output impedance go back to proper value, OC_DETECT bit will be cleared automatically.
However, once recovering from over current protection status, I'm not sure whether user need to perform something additional setting(including not only hardware setting but also software register setting) or not.
Could you please comment about this point ?

Q3,
Is there any case that automatic level calibration fail except unproper register setting related to actuator ?
According to datasheet, there is following description.

--
Calibration failures are typically fixed by adjusting the registers associated with the automatic level-calibration routine or, for LRA actuators, the registers associated with the automatic-resonance detection engine.
--

This shows that calibration fail may occur unproper register setting.
However, if you have any other experience except about related to register setting, could you please comment about it ?

Best Regards,

RE: DRV2605L: Treatment under fault condition

Ryuuichi machida — Thu, 23 Jul 2026 22:22:45 GMT

Hi Chen-san,

Is there any update for my latest question ?

Best Regards,

DRV2700: When DRV2700 boost enable the device can not normal work.

Jimmy WANG — Thu, 23 Jul 2026 08:03:31 GMT

Part Number: DRV2700

Hi team,

When the DRV2700 starts up with boost, it will impact with the input signal.

Do you have related exprience? thanks

RE: DRV2700: When DRV2700 boost enable the device can not normal work.

Hailong Chen — Thu, 23 Jul 2026 21:52:16 GMT

Thanks for reaching out. Will provide the feedback shortly

RE: DRV2700: [DRV2700] Understanding piezo voltage limits in TI high-voltage driver reference design

Hailong Chen — Thu, 23 Jul 2026 21:51:21 GMT

Thanks for reaching out. Will provide the feedback shortly.

DRV2700: [DRV2700] Understanding piezo voltage limits in TI high-voltage driver reference design

Gaston Schelotto — Thu, 23 Jul 2026 07:53:00 GMT

Part Number: DRV2700

I am evaluating the TIDU994A TI reference design that uses the AB5027B-3-LW100-R piezoelectric transducer and noticed an apparent discrepancy with the transducer manufacturer's specifications.

According to the piezo datasheet, the maximum input voltage is specified as 30 Vp-p. However, the TI reference design appears to drive this transducer with a significantly higher differential voltage (up to approximately 120 Vp-p, according to my interpretation of the documentation).

Could you please clarify:

Is the AB5027B-3-LW100-R in the reference design exactly the same device as the commercially available part from PUI Audio?
Is the piezo actually subjected to the full differential voltage generated by the driver, or is the effective voltage across the transducer limited by the resonant network or another mechanism?
Is the 30 Vp-p rating in the piezo datasheet considered a recommended operating condition, or does TI have data indicating that higher drive voltages are acceptable under specific operating conditions (e.g., resonant operation, limited duty cycle, or pulsed excitation)?

DRV8244-Q1: Question about RHi-Z of DRV8244-Q1

Jakeen — Tue, 21 Jul 2026 07:50:19 GMT

Part Number: DRV8244-Q1

Hello Team,

I see there is a RHi-Z defined for OUT pin in datasheet. I have a few questions about it.

There is a switch showed with RHi-Z in below picture. Does it mean that Rhi-Z is available in some states and RHi-Z is not available in some other states? If so, in what states Rhi-Z switch will be turned on? By the way, is Rhi-Z a real resistor? Or it's just a equivalent resistor to show the resistance between OUTx and GND.
I'm a bit confused about below description. From my understanding, Voutx shall be 0 V if DRV8244 is in SLEEP state. Is it correct that Voutx=Vvm=13.5V while DRV8244 is in SLEEP state?

RE: DRV8244-Q1: Question about RHi-Z of DRV8244-Q1

Joshua Horlander Cruz — Thu, 23 Jul 2026 21:46:32 GMT

Hi Jakeen,

[quote userid="697882" url="~/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/1666061/drv8244-q1-question-about-rhi-z-of-drv8244-q1/6426100"]How do you think about that we run one ECU in the off-state diagnostic mode and run the other ECU in a state with the lowest pull-down current? Can it work? Actually, I'm not sure which state is with the lowest pull-down current. It will be not SLEEP state as you said. How about Standby? Or even shutoff the driver IC with cut off VM and VDD/nSLEEP power supply?[/quote]

I need to check these states on bench, especially with this specific setup. I will get back to you tomorrow with an answer.

[quote userid="697882" url="~/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/1666061/drv8244-q1-question-about-rhi-z-of-drv8244-q1/6426100"]By the way, I would like to confirm with you if below understanding is correct. For one full-bridge case, we only need to consider RHi-Z for 2 times. Off-state diagnostic is verified by TI and must be ok. Then for 2 full-bridge case, we need to consider RHi-Z for 4 times. And you think there are risks for off-state diagnostic. Is it right?[/quote]

Correct, the issue is with more connected outputs the pulldown current gets stronger so the minimum load resistance that be detected as a normal case gets closer to zero.

Regards,

Joshua

AM6442: Clarification on ICSSG_PWM0 Register for AM64x

Laura Manzo — Thu, 23 Jul 2026 09:14:09 GMT

Part Number: AM6442

Hello,

I'd like to better understand "Table 14-10359. ICSSG_PWM0 Register Field Descriptions" from AM64x user guide, and I'm particularly interested in sigma-delta related triggers.

Could you please explain when the following bits are set? I'm planning to use all 9 SD channels.
1h: PWM0_OVER_ERR_TRIP (trip_e4)
2h: PWM0_0_SD_SHORT_ERR_TRIP (trip_e3_0)
3h: PWM0_1_SD_SHORT_ERR_TRIP (trip_e3_1)
4h: PWM0_2_SD_SHORT_ERR_TRIP (trip_e3_2)

Also, how do the other fields in the table control PWM behaviour?

I couldn't find any example code related to this feature. I also checked the Motor Control SDK. Could you point me to any example code, if available?

Thank you in advance.

Best,
Laura

RE: AM6442: Clarification on ICSSG_PWM0 Register for AM64x

Achala Ram — Thu, 23 Jul 2026 20:43:29 GMT

HI Laura,

This register provides the functionality to enable and clear error trips that go to the PWM TZ block.

You can refer to the SDFM example & SDFM Fast Detect documentation, and also ICSS PWM driver to understand how this feature is used to enable and clear events routed to PWM TZ.

2h: PWM0_0_SD_SHORT_ERR_TRIP (trip_e3_0)
3h: PWM0_1_SD_SHORT_ERR_TRIP (trip_e3_1)
4h: PWM0_2_SD_SHORT_ERR_TRIP (trip_e3_2)

These are SDFM Fast Detect events generated by the Fast Detect block. The block provides fast over-current detection by counting zeros and ones in a programmable sliding window. Based on configurable zero max/min limits, the zero counter is compared to those limits. If the zero counter crosses a limit, an error signal is sent to the corresponding PRU-ICSS PWM Trip Zone block.

See the fast detect details. https://software-dl.ti.com/processor-industrial-sw/esd/motor_control_sdk/am243x/2025_00_00_06/docs/api_guide_am243x/SDFM_DESIGN.html#FAST_DETECT

[quote userid="709882" url="~/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/1666973/am6442-clarification-on-icssg_pwm0-register-for-am64x"]I couldn't find any example code related to this feature. I also checked the Motor Control SDK. Could you point me to any example code, if available?[/quote]

There are SDFM examples in the Motor Control SDK for AM243x that support Fast Detect and use this functionality.

https://software-dl.ti.com/processor-industrial-sw/esd/motor_control_sdk/am243x/2025_00_00_06/docs/api_guide_am243x/BASIC_SDFM_EXAMPLES.html

Also see the PWM driver, which include APIs to configure this register for trip masks, clearing trips, generating software trips etc.

software-dl.ti.com/.../group__PRUICSS__PWM__API.html

BR,

Achala Ram

DRV8301: Alternate with software for DRV8301-69M-KIT

Priyadarshini N M — Thu, 23 Jul 2026 04:13:10 GMT

Part Number: DRV8301

Hi!
When I was looking for an alternate for DRV8301-69M-KIT, I saw the following recommendation on the forum: www.ti.com/.../DRV8363-Q1EVM
The suggested alternate seems to be a recommendation for Sensored Trapezoidal drive.

However, I am looking for an evaluation kit which is developed for FOC. Additionally, I am looking to play around with the respective FOC code of the kit. Hence, I prefer something with software code more than a GUI option.

Please suggest suitable options for the above requirement. It would be appriciated if you could also provide the path for the code as well.

Thanks & Regards,
Priya

RE: DRV8301: Alternate with software for DRV8301-69M-KIT

Joseph Ferri — Thu, 23 Jul 2026 19:55:51 GMT

Hi Priya,

The majority of our devices use sensored trapezoidal code to run the GUIs.

You can check out our DRV8353EVM, which uses INSTASPIN FOC.

I've linked the quickstart guide here.

https://www.ti.com/lit/ug/slvubh8b/slvubh8b.pdf

Thanks,

Joseph

LMG2104R022: Schedule plan for release as samples and production

Jon Northup — Tue, 21 Jul 2026 03:39:59 GMT

Part Number: LMG2104R022

I'm very interested in recommending the LMG2104R022 for a new project, but will need to know what is the plan schedule to make engineering samples available, and what timeframe it will ramp up as available for small builds. Thanks!

RE: LMG2104R022: Schedule plan for release as samples and production

EricLee — Thu, 23 Jul 2026 19:45:51 GMT

I don't know well now. Please contact +1-855-226-3113. I think he/she will redirect you to a right contact.
If you post after Oct/2026, I think you can get more info via E2E.

-EL

RE: LMG2100R044: TIDA-010936(LMG2100 GaN) — does the DC-bus shunt + INA310A protect against hard short-circuit?

EricLee — Thu, 23 Jul 2026 18:58:54 GMT

Hello Pham

Yes, R1 resistor cannot sense peak switch current. Pleas consider using R18, R26 and R39. I don't know original intention of TIDA-010936 designer, but I guess R18, R26 and R39 are provided for fast peak current sensing.

Referrring https://www.ti.com/lit/ug/tiduf68a/tiduf68a.pdf?ts=1784832279224, the three-phase GaN inverter offers a hardware-based short-circuit projection using high-side DC-link shunt with a high common-mode window comparator with a configurable overcurrent threshold, which turns off the PWM buffer. A high-side DC-link current-sense comparator allows hardware-based short-circuit protection. INA241A's high signal bandwidth supports low latency phase current measurement of high-speed motors as well as low latency detection of high-current transients such as during a short-circuit event.

-EL

RE: DRV8350: DRV8350HRTVR - MSL issue

Joseph Ferri — Thu, 23 Jul 2026 18:58:51 GMT

Hi Kevin,

The parts are MSL 1 now. The web is outdated, the MSL 2 was changed to MSL 1 due to testing cost/difficulty.

Thanks,

Joseph

DRV8350: DRV8350HRTVR - MSL issue

Kevin Yu — Thu, 23 Jul 2026 04:28:46 GMT

Part Number: DRV8350

Dear Sir/ Madam,

We received the parts and the MSL shows MSL 1. The date code is 2613. But the website shows MSL 2. Would you please confirm whether it is correct?

Thank you

Yours sincerely,

RE: LMG2104R022: Schedule plan for release as samples and production

Jon Northup — Thu, 23 Jul 2026 18:46:18 GMT

And who is my FAE? I'm located in St Louis, MO.

Me not knowing who is my FAE is why I asked E2E. Please don't push me away so fast. 😞

RE: LMG2104R022: Schedule plan for release as samples and production

EricLee — Thu, 23 Jul 2026 18:28:30 GMT

Please contact your local FAE. I am not allowed to disclose the information in public.

-EL

DRV8243-Q1: Increase current by having half bridges parallel

Markus_Fleck — Thu, 23 Jul 2026 17:14:29 GMT

Part Number: DRV8243-Q1

Dear Team,

is it possible to parallel the two half bridges and increase short time current capability?

If yes anything special to consider?

BR,

Markus