Motor drivers forum - Recent Threads

DRV8410: Schematic review

Jeff YANG — Thu, 08 Oct 2026 03:23:27 GMT

Part Number: DRV8410

Hi Team,

Would you please review below schematic? thanks!

Jeff

RE: DRV8410: Schematic review

Murugavel4637 — Thu, 08 Oct 2026 17:01:12 GMT

Hi Jeff,

The schematic looks okay and aligns with the datasheet suggestion for this device. Thank you.

Regards, Murugavel

RE: DRV8904-Q1: SPI response from the slave is incorrect

Murugavel4637 — Thu, 08 Oct 2026 16:57:00 GMT

Hi Likith,

[quote userid="721030" url="~/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/1687562/drv8904-q1-spi-response-from-the-slave-is-incorrect/6504719"]I am trying to control OUT1, via SPI using register at address 0x08 bit 0 and 1.
As response i am receiving 0xd001 and 0xd002, but there is no change in the voltage at OUT 1.
Using a resistive load at OUT 1.[/quote]

The MSbyte 0xd0 suggests there was an (Active) OLD (open load) detected. By default OLD is enabled in the DRV8904-Q1. See section 8.3.3.5 Open-load detection (OLD) in the datasheet - pages 45 to 49.

For testing you could disable the OLD prior to enabling the HBs. See below.

How was the load resistor connected and what was the resistance value and VM supply voltage?

Regards, Murugavel

DRV8904-Q1: SPI response from the slave is incorrect

Likith R — Wed, 07 Oct 2026 06:51:43 GMT

Part Number: DRV8904-Q1

I have establised the spi communication with DRV8904, irresective of register i am trying read, IC status register is stuck at 0xc0.

Even though 7th bit of my IC status register is reserved and should be 0, how is the response of status register is 0xc0.

To demonstrate this behavoir i am reading register at address 0x07 ie, Configuration Register
expected output is 0x0040 but i am getting 0xc040.

I have attached images of debugger window and oscilloscope where red signal is SPI_CLK and blue signal is MISO (SDO).

RE: DRV8952: Pin 21 VREF on PWP Package

Gordon Su — Thu, 08 Oct 2026 16:50:14 GMT

Thank you for your prompt response and detailed explanation. I somehow missed that.

DRV8952: Pin 21 VREF on PWP Package

Gordon Su — Wed, 07 Oct 2026 21:15:50 GMT

Part Number: DRV8952

Hi,

I understand that the VREF pin, together with the IPROPI# pins, is used for current regulation in the 44-pin DDW package. How does the VREF function operate in the 28-pin PWP package? Could you please advise how pin 21 of the PWP package should be connected externally? Thank you.

Regards

Gordon

RE: DRV110: Issue with Min Duty Cycle

Mojtaba Afshar — Thu, 08 Oct 2026 16:03:24 GMT

Hi Janathan,

As described above, the device operates as a hysteresis controller via a comparison between $V_{REF}$ and $V_{SENSE}$ . Please note that the $18 m Ω$ resistor is relatively small, making it sensitive to noise. While the provided waveforms indicate that the hysteresis is functioning as intended, some deviation may be present due to the amplifier. I would recommend:

1- Measuring the voltage across $R_{SENSE}$ and the Sense pin on the board.
2- Increasing the $R_{SENSE}$ value. For this configuration, the maximum allowable value is $75 m Ω$ .

Regards

Mojtaba

DRV110: Issue with Min Duty Cycle

Jonathan Hanches — Tue, 06 Oct 2026 15:55:52 GMT

Part Number: DRV110

Hello,

I've have been doing some testing using the DRV110.

The solenoid it self is being energized off of the 270VDC Bus.

Characteristics of the soleniod are 18.9mH and 13.95DCR.

We have ran simulation using there parameter and adjusted the scaling on V_Sense Pin such that we have a Peak Current of 3.3A and a hold current of 1.9A.

The DRV Parameters are as such:

R_Peak = 684kOhm (3.3A)

R_Hold = 198kOhms (1.9A)

R_OSC = 400kOhms (10kHz PWM Freq)

C_Keep = 50nF (5mS Peak)

Simulation performance looks great, and this is what we are expecting to see on the board.

However, then perform in lab testing we are noticing that the Hold Current can not meet the same duty cycle to modulate with the correct current.

When using the same parameters on the board, we notice a min duty cycle of 16.8%, technically the DRV110 has a min duty cycle of 7.5%.

So using the same parameters on the physical board yield this result:

Dark Blue Graph: V_Sense pin of the DRV110.

Teal Graph: Current through the solenoid.

The observed Duty Cycle here was 27.22%.

Could you help us determine what may be preventing the duty cycle from decreasing sufficiently to regulate the solenoid current to the expected 1.9 A hold current? Are there any factors in the DRV110 application or layout that could cause the minimum duty cycle to be higher than the specified value?

Thanks!

Jonathan

RE: DRV8162: Follow-up regarding the support request dated August 24, 2026 "DRV8162: Request Functional Safety Information DRV8162"

Anthony Lodi — Thu, 08 Oct 2026 15:47:55 GMT

Hi Jascha,

I apologize for not getting back to you on this. Usually for functional safety documentation we upload this to ti.com/secureresources and can approve users with NDA. However, for the DRV8162, I am not seeing the folder in our secureresources so I am working with the team to understand the status/location of the functional safety documentation. I hope to have more clarity by the end of the week.

Regards,

Anthony Lodi

DRV8162: Follow-up regarding the support request dated August 24, 2026 "DRV8162: Request Functional Safety Information DRV8162"

Jascha Neuhausen — Thu, 08 Oct 2026 09:17:30 GMT

Part Number: DRV8162

Dear TI-Support,

On August 26, I submitted a request for the “Functional Safety Information” for the DRV8162.
The next day, I received a reply from “Anthony Lodi” saying he would get back to me by the end of the week. I haven't received any further response since then. That's why I wanted to check whether my request got lost or what the current status is.

Best regards,
Jascha Neuhausen

DRV8334: DRV8334 Sudden Failure During High-Speed BLDC Blower Operation

Bhulakshmi Nanjam — Thu, 08 Oct 2026 15:09:03 GMT

Part Number: DRV8334

Dear TI Support Team,

We are using STM32G431RBT3 + DRV8334 to control a 24-V high-speed BLDC blower.

Motor control:

PWM frequency: 20 kHz
Timer clock: 48 MHz
PWM period: 2400
DRV8334: 3x PWM mode
INHA/INHB/INHC → TIM1 CH1/CH2/CH3
INLA/INLB/INLC → TIM4 CH1/CH2/CH3
H1/H2/H3 → TIM3 (Input Capture)CH1/CH2/CH3
Hall state is used for U/V/W commutation.
External MOSFET: STL90N6F7
In our implementation, INLx is the primary PWM control with a command range of 0–2400 (2400 = 100% duty applied), and the corresponding INHx operation is handled according to the DRV8334 3x PWM mode.

Main DRV8334 settings:

Dead time: 2000 ns
Smart Gate Drive: Enabled
Shoot-through protection: Enabled
Rsense: 0.1 milli ohm
CSA gain: 20 V/V
SNS_OCP: 500 mV
VDS OCP HS/LS: 1.25 V

Failure:

The same hardware had been operating normally for several days, and during those days we had already tested the blower at higher speeds, including approximately 75 ,000 RPM, without any failure.

During a later test, we increased the speed from approximately 5,000 RPM toward 65,000 RPM. The failure occurred suddenly. The DRV8334 was damaged and PCB copper tracks were burned.

After the failure:

Both B-phase high-side and low-side STL90N6F7 MOSFETs measured D-S short.
DRV8334 pins 30–36 and 41–47 were physically damaged.
Supply current observed was approximately 5 A.
Measured phase voltage was below approximately 30 V.
We cannot determine whether the DRV8334 or MOSFETs failed first.

We would like your help to understand what could cause this type of failure, particularly whether a switching/gate-drive transient, shoot-through, MOSFET failure, or another DRV8334-related condition could damage both the driver and the MOSFETs.

Please also review our DRV8334 register configuration Reg Config.zip and advise if any settings should be changed for this application.

We can provide the complete SPI register readback, schematic, PCB layout, MOSFET circuit, and failure photographs for further analysis.

Best regards,

N BHULAKSHMI

DRV3946-Q1EVM-DESIGN: EVM is not working as expected

Muthuramalingam G — Tue, 29 Sep 2026 06:15:14 GMT

Part Number: DRV3946-Q1EVM-DESIGN

GUI is configured as expected and EVM is not turning OFF the output drives

RE: DRV3946-Q1EVM-DESIGN: EVM is not working as expected

David Medis — Thu, 08 Oct 2026 15:06:29 GMT

Hi Naveen,

The DRV3946-Q1 is a low-side driver so the before the outputs are enabled you should see 12V. When the driver is enabled, the outputs will go low.

Best,

David

RE: DRV110: Issue with Min Duty Cycle

Jonathan Hanches — Thu, 08 Oct 2026 14:19:32 GMT

Hello Mojtaba,

I'll provide you with the P-Spice Schematic with is representative of the customer board.

The Physical Resistor used is a 18mOhm Resistor, however we needed Isolation between the HI Voltage and LOW Voltage, so we used and AMC1300 (Gain of 8.2).

We then used a Differential Gain OP-AMP (Gain of 0.18) to get an equivalent R-Sense of 26.6mOhms.

So, we check the values with the Table, and it seems that it should work. However, when we are testing, we see that the Duty Cycle is too high at the hold state causing the current to be higher than the 1.9A we need.

Regards,

Jonathan

RE: MCF8315C-Q1: MCF8315C‑Q1: Pseudo‑stall detection optimization for AGS application

Venkatadri Shantaram84961 — Thu, 08 Oct 2026 12:42:47 GMT

Hi Ian Pu,

I will aim to respond by Friday.

Thanks and best regards,

Venkatadri S

MCF8315C-Q1: MCF8315C‑Q1: Pseudo‑stall detection optimization for AGS application

Ian Pu — Wed, 23 Sep 2026 02:46:52 GMT

Part Number: MCF8315C-Q1

Our customer uses MCF8315C‑Q1 for automotive AGS (Active Grille Shutter), which requires accurate position control.

As the device only provides sensor‑less FOC speed closed‑loop, position computation is done by host MCU through speed integration. A power‑on auto‑learn procedure calibrates the coordinate reference by driving the motor to mechanical open/close end‑stops.

The problem arises during auto‑learn. Limited by insufficient mechanical stall torque, the motor jitters at end‑stop instead of stopping completely. This pseudo‑stall will not trigger MCF8315C‑Q1’s native BEMF‑based stall protection, and non‑zero speed feedback is returned.

Customer would like TI to confirm whether this behavior is expected for the built‑in stall detection.

An MCU‑side auxiliary stall‑detection strategy has been implemented with three criteria:
1. Motor runs in closed‑loop mode
2. Bus current > 25 mA (empirical threshold)
3. Above conditions persist for ≥250 ms

This solution exhibits random detection defects:
1. Miss‑detection: parameters occasionally fail to meet criteria at real end‑stop. Continuous motor jitter and position drift cause auto‑learn failure.
2. False‑trigger: stall is incorrectly flagged before reaching end‑stop, resulting in unintended motor shutdown.

Customer requests TI’s support:
1. Evaluate reliability of current stall‑detection observables and provide insight into sporadic detection failures. If valid, customer will tune thresholds for better performance.
2. High‑priority: recommend alternative, more robust monitoring variables to enhance MCU‑side pseudo‑stall judgement.

MCF8329HSEVM: Fault_Status_Registers addresses

Henry Francesconi — Thu, 08 Oct 2026 09:11:20 GMT

Part Number: MCF8329HSEVM

Dear Sirs,

I'm having troubles with reading Fault_Status_Registers of the MCF8329HS. It looks like the addresses reported on datasheet (SLLSG20 – MARCH 2026) are wrong. Please find them on table 9-1 at page 140 and here below: In particular, I tried to read back the watchdog fault bit in the CONTROLLER_FAULT_STATUS register, but it does not work. I tried to read it at address 0x0E2 instead of 0x002 and it works (just my guess not documented anywhere). Could it be that the addresses are 0x0E0 and 0x0E2 instead of 0x000 and 0x002? And what about 0x024C? I didn't tried it yet. Of course MEM_PAGE and MEM_SEC are zeroes as stated in 7.6.2.1 at page 90.

Regards

Henry

DRV8306: DRV8306 Schematic review

Kristjan-Peeter Ivask — Thu, 08 Oct 2026 09:05:28 GMT

Part Number: DRV8306

Hello! I'd like to preface this with the fact that I am a second year bachlors student in a non english country and this is my first time designing a electrical schematic from scratch. I would like for some help reviewing my schematic before I order something and have it not work. Thank you in advance!

The system should be 24 V and sustain a 9.5 A peak current. The datasheet for the motor in question will also be provided below.

My biggest concerns are with the current sensing, and hall sensor wiring.

MotorControl.pdf

DF45L024048-A2.pdf

RE: DRV3946-Q1EVM-DESIGN: EVM is not working as expected

Naveen kumar — Thu, 08 Oct 2026 07:43:27 GMT

Hello David,

Without even setting the Channel to 75% duty cycle also I can able to see the Driver A output Voltage as 12V. Even without enabling the trigger. In Drv3946-q1 Evm board. I tried to disable the pin still i can see the Voltage in the drive A output.
Can we have a short meeting to discuss and understand this real quick?

RE: ULC1001: LCS-FL-RNG15

Lesdey — Thu, 08 Oct 2026 05:56:19 GMT

Thank you for your support Isaac.

Regards,
Lesdey

ULC1001: LCS-FL-RNG15

Lesdey — Tue, 06 Oct 2026 13:50:37 GMT

Part Number: ULC1001

Hi TI Team,

Regarding the flexible seal used in the LCS-FL-RNG15 design, could you please confirm the exact material used in your prototype?

Thank you for your support.

Best regards,

DRV8762-Q1: Ringing on the ISNSB

Hanbing Xiao — Tue, 29 Sep 2026 10:28:46 GMT

Part Number: DRV8762-Q1

Hi team

customer find there is big ringing when the low side switch opens. Below is the waveform. CH1 is MOTB, CH2 is ISNSB, CH3 is MOTA. The ringing disappears when the load change from motor to resistor. Could you please explain why would this happens and how to avoid ringing when use a motor?

Customer said that they just connect our EVM to the motor. They don't connect any other capacitor GND. I am asking them to provide the real test enviroment. Will provide later.

Could you please share the test waveforms of DRV8762-Q1? The bus voaltge is 48V. We would like to know the ideal waveforms of MOTA, MOTB and ISNSB.

Hanbing

RE: DRV8762-Q1: Ringing on the ISNSB

Hanbing Xiao — Thu, 08 Oct 2026 05:55:32 GMT

Hi Joshua

Customer provides their motor schematic. Could you please guide us how to decrease the current ringing by changing below parameter?

The M- and M+ is connected to the DRV8762 EVM.

Hanbing

RE: DRV8904-Q1: SPI response from the slave is incorrect

Likith R — Thu, 08 Oct 2026 05:11:24 GMT

Hi Murugavel,

Thank you for the clarification,
I am trying to control OUT1, via SPI using register at address 0x08 bit 0 and 1.
As response i am receiving 0xd001 and 0xd002, but there is no change in the voltage at OUT 1.
Using a resistive load at OUT 1.

Our objective is to control individual half bridges which can be taken forward to control H bridges.

RE: MCF8315C-Q1: MCF8315C‑Q1: Pseudo‑stall detection optimization for AGS application

Ian Pu — Thu, 08 Oct 2026 01:51:16 GMT

Hi Venkatadri,

Do you find more information from JSON?

Thanks and best regards,

Ian Pu