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DRV8301: DRV8301 limits - need more gate drive average current

Kurt Kloesel19
Prodigy 130 points
Part Number: DRV8301

Dear Sirs/Madams-

I have worked with the DRV8301 extensively via the DRV8301 individually and the DRV830x-HC-C2-KIT_v105 kit and the DRV8312-C2-KIT_v128 kit and the HVMotorCtrl+PfcKit_v2.1 kit.  I am now to the point where I have to increase the amount of current and power significantly. I am estimating that I will have to place 6 NMOS MOSFET's in parallel for one leg of a 6 way/3 phase bridge.  The combined gate capacitance of one leg (6 MOSFET's) is about 25 nanofarads.  Document SLOS719F.pdf, Page 26, Equation 3, Section 8.2.2.1 "Gate Drive Average Current Load" is 30mA and  indicates the possible limits of the DRV8301 trying to drive 36 MOSFETs (and also page 15, third paragraph, limits to 30mA).    I have found another TI document that requires study (SLUA618A.pdf, specifically starting on page 6) on my fundamental short comings of understanding this issue.

In the meanwhile, can you recommend some TI high side/low side driver gate driver products that may be suitable for my application?

Thanks,

Kurt

  • 0
    Prodigy 130 points

    OK- studying - Ah.  The 'Miller Effect' ....

    Kurt

  • 0 in reply to Kurt Kloesel19
    TI__Guru 61330 points
    Kurt,

    Could you explain the voltages and current you expect to be driving? We have some customers using one FET to push 300A.

    Regards,

    -Adam
  • 0 in reply to Adam Sidelsky
    Prodigy 130 points

    Adam/Yao-

    Thanks for the discussion.  Here is some relevant information regarding this discussion:

    1.) Document SLOS719.pdf states on page 15:

    "The three-phase gate driver can provide up to 30mA of average gate drive current. This will support switching frequencies up to 200 kHz when the MOSFET Qg = 25nC." and gives a recommended  C_BST_X of 0.1uF between pins BST_X and SH_X.  The document also shows on page 14, Section 7.2 "Functional Block Diagram" the bootstrap diodes inside the chip but doesn't mention the nature of these diodes. My current study indicates these diodes should be ultra-fast and have minimum reverse recovery current or maybe they should be Schottky diodes.

    2.) Document SLUA618A.pdf discusses the sizing of the bootstrap capacitor on page 16 equation 18.

    3.) The document  SUM110N0.pdf which discusses the Vishay Siliconix SUM110N06-3m9H N-Channel, 60V, MOSFET that is offered in the Texas Instruments DRV830x-HC-C2-KIT_v105 shown in the schematics has a total dynamic gate charge of  200 nColoumbs and a gate-source dynamic capacitance of 80nC.  This seems inconsistent with the recommended 25nC stated in the SLOS719.pdf document, but it works, so I should be happy (and I am!)

    4.) I have found a document that goes through the gate charge calculation procedure and seems to be effective.  This is from a competitor so please excuse me for referencing it here, but for the benefit of anyone involved. It's International Rectifier DT98-2.pdf.  If you have a TI document that is similar, let me know, SLUA618A.pdf is a little deep.

    If you want, I can hit the "Resolved" button on this issue.

    Thanks,

    Kurt