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Part Number: DRV10866
I'd like to know the FG output and Lock detection feature of DRV10866.1. Depend on customer application and environments, the DRV10866 cannot detect the point BEMF cross zero due to noise. In this case, how will FG output be? I guess FG out may not output in this case. Is it correct?
2. Could you please let me confirm about the www.ti.com/.../slva612a.pdf documentMy understanding for the explanation is if internal sampling clock of external system such as MCU is 101.6Hz, the system may detect as rotor is locked even if FG is working. Then, the sampling clock of external system should be 2X from 101.6Hz. Is my understanding correct?Nagata.
1) I have to confirm this, but I believe, it BEMF zero-crossing is being missed due to noise, the FG will stay in its current state (either Hi-Z/Hi_if_pulled_high or GND) and not switch. If fg doesnt switch within lock detect time,, the device will hit lock rotor detection. Let me confirm this.
2) I think your understanding might not be correct. The FG pin is associated with the speed of the motor. If you spin the motor at a multiple of the DRV10866 sampling clock freq(101.6Hz), the FG signal should have the frequency of a multiple of the DRV10866 sampling clock freq(101.6Hz). If this happens, then you may falsely detect the FG signal isnt changing state and thus falsely trigger a locked rotor condition. visually you can see this below:
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In reply to Sanmesh Udhayakumar:
Hi, Udhayakumar -san,
Thank you for your supports.Could you please let me confirm about 2)?
If the FG running with 101.6 Hz which is same frequency as internal sampling clock, the lock will be detect within about 3 sec. Is my understanding correct?
In reply to Shunsuke Nagata:
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