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DRV8303: SPI Slave Mode Timing SCS

Part Number: DRV8303

Hi Team,

I have a question about DRV8303.

Even if SCLK and SDI are input while SCS is low, it operates normally.
Registers can be written and read.
Does it operate normally without tHI_SCS and tSU_SCS in the data sheet?
The following shows the waveforms that operated normally.


In some samples, it can write and read normally and you cannot write and read.
Is this a normal product? Is it a defective product? Why does this happen?

Best Regards,
Ishiwata