DRV8703-Q1: Grounding considerations for layout of Vref signal

I would like to keep my analog reference signal from my uProcessor to the Vref pin (pin 15) as clean as possible in circuit board layout.  The reference signal from the uProcessor is in relation to it's analog ground, so I would like to tie the ground reference for this signal in the driver chip back to the uProcessor analog ground, but do not want all the switching and digital returns going to the uProcessor analog ground.   Do you have recommendations for layout of the three ground pins (pins 1,13, 17) in relation to which pins are the best returns for the digital, analog, and gate switching functions?  I would like to keep my Vref signal and its return as void of other returns as possible.