Dear TI support forum,
thank you very much for giving me the possibility to post my question here.
I made a design with the DRV8323S, using the SPI interface to configure all parameters. Basically the schematics are similar to the evaluation board with
two major exceptions: I fixed the signals ENABLE to high (5V) and CAL to low. However, the high side gate driver signal is always about 24V with VM=24V,
independently from the input signals. The low side gate driver works as expected ( show 10V when activated ). DVDD shows 3.3V, the charge pump works and
the SPI interface works, too. I can set and read registers as expected.
My question: is it ok to fix ENABLE to high or is there a specific power up procedure like: "ENABLE low, then VM, then ENABLE high" or similar. It might be,
that ENABLE implies a kind of reset functionality, which is not given, if I fix it to high.
Thank you very much for your reply.
Daniel