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DRV8323R: Connecting gate driver together (parallel connection of gate drivers)

Part Number: DRV8323R
Other Parts Discussed in Thread: LM5069, LM5060

Hello,

we plan to use DRV8323RS for driving high side 48V bidirectional back-to-back breaker with 8 parallel MOSFETs in each half.

utilising just high side outputs (GHA, GHB and GHC)

Can we connect them together to get consolidated 3A source current? of course assuming we tie INHA, INHB and INHC together as well?

We hope it is better idea then splitting 8 MOSFETs in three unequal groups like (3+3+2) because group with just two MOSFETs will open faster then others...

Thank you in advance,

Sergey 

  • Sergey,

    I would not recommend this approach but technically it could work.

    Have you checked for a dedicated half bridge driver? These typically have a high gate drive strength that would help you.

    Regards,

    -Adam

  • Adam,

    we did not find any suitable half-bridge driver with integrated charge pump for static driving high side MOSFETs... Does TI produce some?

    Some other arguments why we plan to use DRV8323RS:

    - we use it in our ESC and gimbal controllers already, we can handle it successfully and it is on our BOM already

    - we need its buck converter to pre-charge capacitors on low side, about 4900uF x 48V, back is useful and built-in

    - LDO for simple logic gates, chip has it built in

    - one Op-Amp channel to measure current, also built-in

    So, our application is definitely unusual but looks like has a chance :)

    We tried dedicated LM5060 and LM5069 without luck...They are too slow and MOSFETs randomly crash because they are out of SOA. We need much faster operation...

    Can you explain what problems we may face with parallel connection and how to eliminate them? Idea is to consolidate 3 currents and them spread total current to 16 MOSFET (actually 8 back to back pairs) gates via gate resistors...

    Can we simulate it somehow? 

    Regards,

    Sergey 

  • Sergey,

    I unfortunately do not have the tools to simulate this. 

    You could use Independent FET mode which would disable a lot of the protection features and in theory the gates should be able to handle this. 

    I would suggest at least a footprint for a series resistor to each gate so that you can balance parasitics as needed.

    Regards,

    -Adam