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DRV8873: SPI Issue

Part Number: DRV8873

I am validating a design with a DRV8873 motor driver in SPI mode. Everything works as expected, but :

I wanted to link nSleep and nSCS signals to spare a separate signal for both, in my application I wake the driver, send some SPI commands to configure, switch on and off a couple of times and then I'm done.

Now the problem/question is : currently I drive nSCS down before sending SPI commands, and raise it as soon as I'm done :

    P5OUT &= ~P5::SPIS;  // SPIS is the nSCS signal
     __delay_cycles(10);

    TSPI::byteIO(address << 1);
    TSPI::byteIO(data);

    __delay_cycles(10);
    P5OUT |= P5::SPIS;

This happens a couple of times in a sequence of a couple of seconds. If I drive nSCS down for the entire cycle, the first SPI commands (without delays between them) will go through and then nothing seems to be accepted anymore (as soon as there is a pause of a couple of hundred milli-seconds).

Hence the question : is there a requirement that nSCS is driven low before the SPI clock activation ?

  • Hi Retokid,

    Please refer to section 7.5.1.2 SPI for a Single Slave Device of the DRV8873 datasheet. This section details the requirements for a valid SPI transaction.

    Also, can you provide more information regarding "I wanted to link nSleep and nSCS signals to spare a separate signal for both,"?

    Are you connecting both nSLEEP and nSCS to a single SPIO? Can you provide a schematic of this connection?

  • Hi Rick,

    thanks for pointing to the point : 

    The nSCS pin should be taken high for at least 500 ns between frames.

    So clearly I cannot leave nSCS at low level for the entire operation and that explains why it won't work when I try.

    So unfortunately I'll need to drive nSleep and nSCS separately.

    Thanks for your help,

    Marc