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DRV8701: DRV8701 short circuit test caused chip damage

Part Number: DRV8701

Hi,

Here's my schematic, And when I set the grid drive to 150/300mA , 24V short circuit test (two half-bridge mid-point short connection) will damage DRV8701, directly A phenomenon that nFAULT pin outputs low levels, And DRV8701 a short circuit inside, Chip damage. But 12 V doesn't damage when it's powered. Then I took IDRIVE pin directly to AVDD, Close OCP protection, Driving capacity 25/50mA, At this point, the same short circuit test as above will find no problem, The chip can also be protected normally. So is this a problem OCP protection? Or is there a problem with my schematic design?I hope you can answer my question!

  • Hello,

    I want to make sure I understand your question correctly. So the device gets damaged when you short the two switching outputs of the H-bridge (SH2_MotorD and SH_MotorD) when VM=24V and Idrive=150/300mA. Then nFAULT pin drops to a low value afterwards. However, when you change VM to 12V and Idrive to 25/50mA you observe no problem. Is my understanding of your problem correct?

    I have some further questions:

    1. Did you have a load connected when you ran the short test? If yes, what type of load?
    2. Were you able to take any oscilloscope pictures showing the nFAULT signal when you ran the  short circuit test at VM=24V?
    3. Are you able to provide the layout of your board? You can send it via private message if you don't want to share here in the forum.

  • Hi Pablo Arme,

    Thanks a lot for your prompt answer. First of all, your understanding is not completely correct, when the OCP is not closed, VM=24 V, IDRIVE=150/300 mA or IDRIVE= 25/50mA will damage the chip. When the IDRIVE is directly connected to the AVDD,and the OCP will be closed, so IDRIVE=25/50mA at this time.When VM=24 V ,I do the same short circuit test( short the two switching outputs of the H-bridge (SH2_MotorD and SH_MotorD)),but the chip will not be damaged. Let me answer your three questions

    1.I don't have a load connected when I ran the short test.

    2.I don't have the  nFAULT signal of oscilloscope pictures.However,I test the signal of GND and SHx. As you can see, a negative voltage will be generated at short connections, about -6.8 V, which will not damage the chip.(VM=24V,IDRIVE=25/50mA and the OCP is closed)

    3.I will provide the layout of my board.Motor_Controller_CL-02_V2.0-TiE2E.rar

  • Hi,

    Thank you for providing the information. I will need more time to look through your schematic and layout. Expect a reply from me by 8/2 US time. 

  • Hi,

    i went over the schematic and layout of your design and have a few more questions for you:

    1. What is the value of Vref in the schematic you attached above? In the schematic it shows that both R26 and R33 are 0Ω resistors. I'm assuming those values were changed?
    2. Looking at the H-bridge supply (24V_VM) and 24V device VM, they are connected via a fuse but it is not shown as connected in the layout. Was 24V and 24V_VM connected in the final board? I am assuming they were connected on the board but I just want to confirm.
    3. was there any physical damages to the driver (burn marks, smoke, etc) when the short test was conducted or did the device just stop working after the short test without physical damages? 

    I am sorry for the multiple questions. I want to make sure I completely understand the problem to try to identify what is causing the problem.

    While I wait for your reply, I will keep looking through the schematics and layout. So far I don't see anything specific in your design that could cause the damage to the device.

  • Hi,Pablo Armet

    Thanks a lot for your prompt answer. Let me answer your three questions:

    1.For the value of Vref,the MCU(STM32F103) output a PWM wave,after RC filtering to the DRV8701 of the Vref pin.So the value of Vref can be programmed.I set the Voltage of Vref about 1.6 V when I did the short circuit test.

    2.The H-bridge supply (24V_VM) and 24V device VM are connected in the final board.

    3.There must be physical damage inside the DRV8701.The temperature of the chip is getting higher and higher.There must be a short circuit inside the chip, but I can't test where the short circuit is.And the MOSFET of H-bridge does not damage.

    Besides, i would like to know if your DRV8701EVM board did short circuit test?And what are the results of the experiment.

    In previous responses,I test the signal of GND and SHx when did short circuit test. There is a negative voltage will be generated at short connections,And i want to know the solution to avoid negative voltage.Can I use a diode for voltage clamp?

    Looking forward to your reply again!

    Regards,

    Kun Li

  • Hi Kun,

    Thanks for the information.

    If you can provide me with a detail of your set-up (can provide pictures if possible) and the sequence of steps you did to perform the short test and under what conditions (supply voltage, loading conditions etc.). It might be possible to replicate the test with the DRV8701EVM. Knowing the set-up and procedure details will also be helpful at knowing if the set-up could be causing the problem.

  • Hi,Pablo Armet

    Thank you very much for your reply.

    The following picture shows my specific short circuit test steps.

    If there is anything not detailed, please point it out.Looking forward to your reply again!

    Regards,

    Kun Li

  • Kun, 

    Thank you for the information.

    I will try to replicate your steps on a DRV8701EVM. Expect a reply from me by 8/7. Thanks again for your patience.

  • Hi Kun,

    I apologize for the late response. I did not get the chance to test this in the lab last week. I plan to go to the lab today and do the short test on the DRV8701EVM. Expect a reply from me by 8/10 US time.

  • Hi Kun,

    Unfortunately, I will need a little bit more time to do the short test. I will give you an update by 8/11.

    In the meantime I have a question. Did you perform the short test with the DRV8701EVM? did the IC get damaged when you performed the second case from your procedure above?

    Again, thank you for your patience.

  • Hi,Pablo Armet

    It doesn't matter.I did not perform the short test with the DRV8701EVM.I don't have the DRV8701EVM.And the IC gets damaged when the second case.

    Look forward to your test results!

    Regards,

    Kun Li

  • Hi Kun,

    Sorry again but I was not able to perform the test in the lab today. I plan to do the test by tomorrow. I will reply with the test results by end of the day 8-12 US time

  • Hi Kun,

    I performed the short test with the EVM following your procedure and was not able to replicate your results. Even with test case 2 (Idrive=150/300mA), the device is not getting damaged. This makes me think this problem might be isolated to your set-up (I was using different board and equipment compared to your set-up). If possible, Can you redo the first case again (I don't want you to damage another IC) and take a scope shot showing SH, nFAULT, and VDS of the high side FET with a time division of 1ms/div? set the trigger to the nFAULT signal and set it to trigger on a negative edge.

    I want to compare your results to mine. If you are getting different results then we are going to have to look at your set-up more closely to determine what is causing the issue.

    looking forward to seeing your results.

  • Hi Pablo,

    Thank you very much for your patient reply. I did the test that you said( case 1, Idrive=25/50mA). I got a couple of waveforms As follows,

    Can you find any problems through these waveforms?  I thought it triggered the PDF through the waveform. The nFAULT trigger period is 3ms.

    Looking forward to your reply again.

    Regards,

    Kun Li

  • Hi Kun,

    Thank you for the information,

    Looking at the first scope shots, the outputs are re-enabled after every 3ms (t_retry) and quickly disabled since the OCP fault is still present which is normal behaviour. 

    As for the second scope shot, the nFAULT signal is not correct. I think you mistook it for the SH signal. How did you measure VDS? did you use a differential probe or another technique? 

    Your results show the OCP functioning properly at least for the this test case where Idrive=25mA/50mA and high side OCP monitoring is disabled. This might not be the case for when you set Idrive=150/300mA and enable high side OCP monitoring.

    If you look at your schematic, you have a diode (D7) between 24V and VM (pin 1) of the driver. This causes the voltage measured at the VM pin of the driver to be less than the voltage measured at the dain of the HS FET (24V_VM). The driver monitors for OCP fault by measuring the VDS of the external FETs. In the case of HS FET, the VDS measured by the driver is the voltage between VM (voltage of pin1 of the device) and SH (OUTx). However, that is not the true VDS value of the HS FET. The true value will be the difference between 24V_VM and SH. This means that the driver is measuring a VDS value which is lower than the actual VDS value of the HS FET. In a case where the difference between VM and 24V_VM is large, this can cause the OCP to not trigger despite the actual current through the FET being larger than the threshold specified in the datasheet. We can confirm if this by measuring the voltage at VM (pin 1) of the driver and the voltage at the drain of the High-side FET (24V_VM). Can you provide these measurements?

  • Hi Kun,

    Can you also provide a picture of your board? I want to verify that there is no bad soldering or other physical issues with the set-up that could cause a potential problem.

  • Hi Pablo,

    Thank you for your reply. 

    I didn't use a differential probe to measure VDS. I used an oscilloscope to connect MOSFET drain and source poles respectively.  This test method is problematic. However I don't have differential probe.

    But I found some problems testing VM(pin 1) and 24V_VM. Here is the waveform I measured. I don't know what caused the 24V_VM waveform badly. And you can see a spike voltage signal of 3ms cycles, and I think that's why the OCP is triggered. And what is the best way to eliminate these undesired signal? Besides, I wonder if you will trigger OCP during short circuit test.

    Looking forward to your reply again.

    Regards,

    Kun Li

  • Hi Pablo,

    Here are picture of my board, I think there is no problem. And I used Channel of Motor_D to do short circuit test.

    Regards,

    Kun Li

  • Hi Kun,

    The spikes shown in the 24V_VM are most likely produced by the rapid enabling and disabling of the FETs every time T_retry and T_deglitch expires. Since VM(pin 1) and 24V_VM are not tightly coupled together (there is diode D7 and Fuse F3 in between), the two signals are not the same. It is possible in a case where the 24V_VM signal drops far below the VM (pin 1) value, that OCP is not triggered since the driver measures a VDS value that is "lower" than the trip threshold despite the actual current being above the I_OCP threshold. If the actual current is high enough and persist for long enough, it can cause damage to the IC. 

    Looking at your board, you could increase the copper area around the driver ICs to improve thermal performance but this will only help in lowering the temperature of the IC. If the OCP issue you are seeing still persists, the IC will continue to be damaged.

    What we ideally want is a direct connection between VM (pin 1) and 24V_Vm to maximize the coupling between the two nodes. This will ensure that the two voltage are close in value and that no incorrect OCP trigger occurs. Try to retake VM and 24V_Vm, as you previously did, but remove diode D7 and Fuse F3. Connect a wire (make sure it is a low impedance wire) between the empty pads to have a more direct connection. I suspect you will see that VM and 24V_VM will be very similar after making the direct connection.

    I am looking forward to seeing your results.

  • Hi Pablo,

    I tested it the way you said. I removed diode D7 and Fuse F3, connect a wire between the VM (pin 1) and 24V_VM pads. As you said, I saw that VM and 24V_VM are very similar after making the direct connection. Then I set the IDRIVE=100/200mA(OCP open) , and did a short circuit test. The IC didn't damage.  When I set the IDRIVE=150/300mA(OCP open), the IC will damage. When I look at the waveform, I think it's because the gate of the MOSFET does n' t have a gate resistance, which causes the MOSFET to turn on faster and the SH waveform to oscillate more seriously, which can trigger OCP by mistake, and the higher peak voltage of the SH will also damage the IC. 

    But there's still a problem. At first, I'm using the diode D7 for reverse protection. But now if I add a diode D7, it still trigger OCP by mistake. 

    Lastly, I'd like to confirm the status of the SNSOUT and nFAULT of the chip when you do the short circuit test.

    Anyway, thank you very much for helping me find out the root cause of the problem.

    Looking forward to your reply again.

    Regards,

    Kun Li

  • Hi Kun,

    Did you collect any scope shots showing the output and nFAULT signal with IDRIVE=100/200mA and IDRIVE=150/300mA? I would like to look at the SH signal and determine whether the oscillation are really causing the OCP to be triggered by mistake. If this is the case, then it means that the oscillations are greater than 1V and persisting for longer than the OCP deglitch time of 4.5µs. 

    Were you also able to collect the SNOUT measurements? If so, can you share it with me. I would like to know how much current is going to the driver. 

  • Hi Pablo,

    I'm so sorry that I have n' t answered your questions these days. I've been busy with other things during this time and I have n' t had a chance to do a test that you said. I'll give you the results of the test when I could do the test. 

    Sorry again!

    Regards,
    Kun Li