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DRV8305-Q1: tDEAD Time

cafain
Mastermind 6365 points
Part Number: DRV8305-Q1

Hi, Staff

I am thinking of using it for the DRV8305Q1.

I have three questions,
All about "TDRIVE" in Figure 11 on page 24 of the data sheet (SLVSD12D).

Q1:What voltage is the gate voltage recognized as Off?
　 Please tell me the regulation of Gate Off voltage. (Min./Typ./Max.)

Q2:If a handshake is performed with VGS=0V to charge the gate on the opposite side,
it is considered that no shoot-through current will occur.
What is the reason for setting tDEAD TIME?
(Is there a possibility that shoot-through current may occur without tDEAD TIME?)

Q3:What should be the reference value for tDEAD TIME?

best Regards
cafain

  • 0
    TI__Mastermind 26046 points

    Hi Cafain,

    Thanks for posting to the MD forum!

    1) The figure makes it a little confusing to tell whether the GHx/GLx voltages are measured with respect to GND, but keep in mind that gate voltage refers to VGS (gate-source voltage). "Gate off" means VGS = 0V. So for GHx to GND, "gate off" will equal PVDD and for GLx to GND, "gate off" will equal 0V so that VGS will be equal to 0V when the gate is off. 

    2) Dead time is set in order to prevent both FETs from switching on at the same time. The device automatically inserts 40 ns minimum dead time after an internal VGS handshake. The main reason for choosing a DEAD_TIME setting larger than 40 ns is because some MOSFETs take longer to switch on/off due to IDRIVE/TDRIVE settings and the Qgd of the MOSFETs. 

    3) A good way to test DEAD_TIME settings would be to start with the longest time and analyze the HS and LS MOSFET's VGS waveforms on a scope. When the MOSFET hits the Miller region, the FET begins to turn on and conduct. Ensuring the LS and HS MOSFET's Miller regions don't overlap ensures that you are not getting any cross-conduction.

    Hope this helps!