Part Number: DRV8305-Q1
I see the Vghs value in DRV8305-Q1 datasheet “6.5 Electrical Characteristics” is not very low and seems not enough to open a high side Mosfet in 24v application Motor Bridge?
Does the Pre-Driver has problem to drive a 24v application Motor bridge?
Can you clarify the intent of the comment? Is the concern with turning off the FET or tuning on FET, or something else?
In general, the device is fine for 24V applications, and I had planned to talk about the process of turning on the FET and how it relates to the VGS spec, where the turning off the FET does not involve the spec at all (as ISTRONG will short the gate and Source together so the FET cannot turn on). But I wanted to make sure I addressed exactly what the customer had a concern with.
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In reply to Cole Macias:
We are test DRV8305-Q1 to control 6 NMOSFET to drive a 24v 3 phased BLDC, It seems the gate drive voltage of the high side NMOSFET should be higher than 24v+Vth.
I see in the Vghs max is 10.7v in DRV8305-Q1 datasheet 6.5 Electrical Characteristics, this voltage is lower than 24v which seems not enough to open the high side NMOSFET, correctly?
Or I misunderstood, the Vghs voltage is the dropout voltage from Gate to Source of NMOSFET?
In reply to user4264875:
As shown by the Gate drive architecture below, the gate of the high side external HS FET would be connected to the GHx pin. To turn on the External FET, the digital logic would turn on the internal FET, who's high side is connected to VCPH and begin exposing it to the external FET with the intent of delivering current equal to the programmed IDRIVE setting. In practice, the Drain of the external FET would be connected to VDRAIN (but, PVDD) which would be 24V in the use case presented above.
So the VCPH, according to the datasheet VCPH Charge Pump: High-Side Gate Supply section, "VCPH [will] supply to PVDD + 10-V [nominal] in order to support both standard and logic level MOSFETs." Which means, VCPH = 34V, nominally. Assuming the Vth of the FET is not greater than 10V, then the FET will turn on, no problem.
In the context of the VGS spec, you will notice we don't have a VCPH spec (besides the apps max), instead we note that VGS (after the losses introduced within the charge pump at various PVDD values) to introduce this "PVDD + 10V". I do agree this is prone to confusion as we should have noted "in reference to PVDD" for VGS spec.
Hope this clarifies the problem, let me know if you have any questions.
Thanks for your reply
It seems I am trying to describe my question, but made it failded for you to understand.
I want to know the value of Vghs is referenced to the GROUND or SOURCE of N-MOSFET?
If it is referenced to GROUND, I think it will have problem to drive a High-Side N-MOSFET.
But according to your explaining, this value seems to be the voltage from SOURCE to GATE of N-MOSFET.
Is my understanding correct?
I think I understand now, let me know if this doesn't answer the quesiton.
Criteria for FET to turn on: V_GS > V_th, so (10V) > Vth for the FET to turn on. To reiterate, if V_th > 10V, then the FET won't turn on for this device.
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