Other Parts Discussed in Thread: TIDA-01496, USB2ANY
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Hi,
Thanks for reaching out! The procedure that you have followed seems perfectly right to me but not sure why EEPROM not ready for read/write access. Let me check with my team and get back to you.
Regards,
Vishnu
Hello User6140909,
As Vishnu said, the sequence seems to be correct but I still have a few questions and assumptions:
UVLO:
The undervoltage lockout leads on the 3.3V LDO is one path to follow. As you know, undervoltage lockout means that the (DRV10)983-Q1 device has determined that the 3.3V LDO is below an acceptable voltage. Note that the 983Q1 uses the 3.3V to power rails inside the device as well. This means, digital rails (e.g. rails that power the EEPROM block inside the device) could be at an insufficient voltage to function normally.
If the UVLO is real, and "random", this usually means the 3.3V is noisy and bouncing around. Use an oscilloscope, and good probing techniques, to probe the voltage between the pin of the V3P3 and the ground of the decoupling capacitor that should be connected to the V3P3 pin. This can happen on custom PCB's with insufficient ground planes and ground return paths. This app note could help you review the layout http://www.ti.com/lit/an/slva959a/slva959a.pdf
Another layout issue could be because of the power pad on the device not being sufficiently connected to the exposed GND pad that should be on the PCB. Unfortunately, there isn't a great way to check this. If you did assembly, I encourage you to use solder paste and good reflow techniques to ensure they're connected. If a PCB manufacturing company did assembly, then it should be a nonissue.
Comments on EERPOM, shadow registers, and flow:
I would just like to outline the usual flow and steps for those evaluating our device.
If you are hitting current limit, I would say you're still in steps 1-3 as the settings. I'm sure you know of the tuning guide: http://www.ti.com/lit/ug/slou477/slou477.pdf
If you aren't getting NACK's very often and you can read back the values you wrote, then I'm going to assume your I2C ecosystem is good. With that being said, if you followed the recommendation to use I2C pullups connected to V3P3, then you might have a risk to have some corrupt waveforms if the 3.3V isn't stable.
Final Debug tips:
It is always good to have a known good set up for debug.
The DRV10983-Q1EVM (with a replaced sleep mode version device) would represent a known good layout. Another known good PCB of your (assumed) design would represent the same layout but different components (and different 983Q1). A USB2ANY would represent a known good I2C interface. Unsoldering the 983Q1 and putting it on a different PCB would help you track if the problem follows the device (which would eliminate the layout or components as the issue).
This concept is known as an AB swap, it would help you narrow down where the problem could be.
Good luck and let us know if you have any questions.
Best,
-Cole