This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8705-Q1: IC status register different than IC status register 1 ?

Part Number: DRV8705-Q1

Hello,

According to the datasheet for the device the response message for the SPI comm contains in the first 8 bits the "IC status register".

This "IC status register" seems to be different then the "IC status register 1" because it does not contain the SPI_OK and POR bits.

Can you please confirm that this is the case ? the SPI_OK and POR bits are missing from the SPI SDO.

Thank you and Regards,

Octavian

  • Hi Obreja,

    The SPI_OK and POR bits are not labeled on table 12 but are included. B15 and B14 are the SPI_OK and POR bits.

  • Hello,

    We also went through the official channels in our company and we got the official response that indeed these 2 bits are always 1 and the registers are different !

    Quote:

    Critical point here to clarify is that the SDO in frame fault response and the STAT_1 fault register are different things. The data is the same. But sent back different ways to MCU.

     

    Table 12 BIT 13-8 are always present in the SDO frame so that controller can pull high level fault info even during read/writes to different registers.

     

    For the in frame response, we must MASK BIT15/BIT14 because those two fields indicate the daisy chain and read/write mode on SDI. So SDO can’t start until it processes first two bits. Which is why those default to 1s.

     

    IC_STAT_1 is the actual status register of the device that can be read from directly. So if the user is ignoring the SDO in frame fault response or needs the SPI_OK/POR bits they would periodically poll STAT_1."

    B15 and B14 are not the SPI_OK and POR bits.

    Thank you and Regards,

    Octavian