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DRV8305: GHx is PVDD when INHx and INLx are both at the same value?

Part Number: DRV8305

Hi there,

I'm still playing around DRV8305 and find that GHx is PVDD  and the source voltage of the high side is also PVDD when the input for INHx and INLx are both at 1/1 or 0/0.

The low side GLx voltage seems OK as it sits at 0.

The driver gets good gate drive voltage (PVDD+10v for high side and 10v for the low side) when INHx and INLx are in the different value.

The driver is in the default mode and the SPI register show DRV8305 is in the 6-PWM input mode.

So I wonder what would run wrong in this case?

Thank you!

  • Hi Yue,

    Thank you for your question! 

    You mentioned that the source voltage of the high side MOSFET is at PVDD, so the fact that the high side gate voltage is PVDD does not surprise me since the driver is operating as expected to ensure that the VGS voltage is 0V to keep the MOSFET off. Since the source voltage is PVDD, VGS would be PVDD-PVDD = 0V resulting in the MOSFET being off.

    In order to figure out why the source voltage is at PVDD it is helpful to know the value of the other INHx and INLx pins. For example, If the input high and low pins to phase A was either 1/1 or 0/0, and if 1 of the other INHx phase pins was 1, with the other input pins being 0, this would result in PVDD being applied to one phase of the motor, but because all the rest of the MOSFETs are turned off there is no path to ground through the phases, and the voltage at the phases (and thus the sources of all the high side FETs) would be at PVDD. Please let me know if you have any further questions.

    Regards,

    Anthony 

  • Thank you very much for the detail explanation, this is exactly how it was like that.

  • Hi Yue,

    Thanks again for your question! Have a great day.

    Thanks,

    Matt