Hello TI Forum,
I am considering using TI's 2 chip solution to power the NXP i.MX 8M Mini. I have been studying the TIDA-050038 schematic to learn how to implement these PMICs in my design, and I do not understand part of the schematic. On sheet 10 of the design (image below), the signal WDOG_B is connected to the base of a PNP transistor (Q3), with the emitted connector to ground. When WDOG_B is high, Q3 will be in reverse-active mode, which I have never seen before. Can anyone explain the purpose of Q3 and Q4? And the design intention behind it?