This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS61086: Compensation (COMP)

Part Number: TPS61086

Hi team,

My customer is evaluating the TPS61086EVM. 

The customer is measuring the frequency response, but they cannot get enough phase margin of the TPS61086. (Iout = about 0.3A, which is about 30deg).

They tried following comp values : Rcomp=44kΩ, Ccomp=820pF which is calculated by Webench. Rcomp=20kohm, Ccomp=1700pF which is calculated by equation(9) in the d/s.  Rcomp=39k~100k, Ccomp=820~1200pF which is described Table5 in the d/s. However, the phase margin was still around 30deg at Iout is more than 0.3A.

Condition

Vin=3.3V

Vout=3.9V

Iout=0.15A(typ), ~0.6A(max)

Cin=10uF (effective capacitance is around 5uF)

Cout=22uF x 4pcs (effective capacitance is around 40uF)

L=4.7uH

If there are any items that can be improved to increase the stability, could you tell me it. (e.g. Increase the output capacity, change the L value, etc.)

Regards,

Yamaguchi

  • Hi Yamaguchi,

    I think the inductor can be tried to a smaller value according to your working condition. If possible, input and output capacitor can be increased tooRcomp can be smaller and Ccomp can be larger for such small output voltage condition, such as Rcomp=16KΩ, Ccomp=2.7nF. Adjustment for comp parameters is recommended compared with test performance simultaneously.

    Best Regards,

    Eric Yue

  • Hi Eric-san,

    Thank you for your supprt. I received additional questions from the customer.

    They conducted a low temperature test (-40degC) with the EVM and found that the phase margin decreased. They said the phase margin is not enough when the output current is more than 0.25A. I think the phase margin changed due to the change in the value of the external components at low temperature. Therefore, I am checking the part number of the external component. I will have a call with them tomorrow to confirm the details.

    They also said that the phase margin is more stable when the output voltage is 4.2V than when the output voltage is 3.9V. Is it possible that the phase margin worsens when the input and output voltages are too close?

    Vin : 3.3V

    Vout : 3.9V, 4.2V, 4.5V

    Iout : 0.15A(typ), 0.6A(max)

    Mode-pin : High

    Regards,

    Yamaguchi

  • Hi Yamaguchi,

    Low temperature will decrease capacitance and accelerate op-amp, which typically increase system cross freq and result in lower phase margin. The main impact may be caused by external components such as input/output capacitors.

    Typically, there is no fixed relationships between phase margin and input/output voltage. It needs to be achieved specifically through bode simulation about duty cycles. In this working condition, I simply simulate it through Webench. The phase margin does better when output voltage increases and the cross freq is decreased.

    Best Regards,

    Eric Yue

  • Hi Eric-san,

    Thank you for the answer. I had a call with the customer today. The customer would like to know the comp value that can be stable at low temp(-40degC).

    They tried the following conditions and observed that the output became unstable when the load was taken at around -30degC~ -40degC.

    Vin=3.3V,

    Vout=3.9V,

    Iout=0.15A(typ), 0.6A(max)

    Rcomp=16kohm,

    Ccomp=2.7nF,

    Cin=10uF//1uF, (effective capacitance is around 5uF)

    Cout=22uF*4pcs,(effective capacitance is around 40uF)

    L=4.7uH,

    Rfbt=39kohm

    Rfbb=18kohm

    They added another 22uF to the input, but the situation did not change. They said they have room to add another 22uF to the output. They also said they can change the inductance value to 3.3uH if needed. In this case, could you tell me the Comp value and the values of inductance, Cin and Cout that will give the highest stability?

    Regards,

    Yamaguchi

  • Hi Yamaguchi,

    The effect of increasing input capacitor is limited. I think easy-to-operate method for a designed board is slightly adjusting Comp value, such as increasing Ccomp with decreasing Rcomp. This process is recommended compared with test performance, because it's hard to define which value is most suitable in theory, maybe Ccomp 2-20nF and Rcomp 10-20kΩ. Next increase output capacitor and change inductor to 3.3uH can also optimize it if possible, change inductor maybe easier for a designed board.

    Best Regards,

    Eric Yue

  • Hi Yamaguchi,

    I think you can first try to change Comp value, change Rcomp to 10k and Ccomp to 10-20nF to test.

    Best Regards,

    Eric Yue