Other Parts Discussed in Thread: TPS3840
Hello team,
I have a question about RESET pin behavior
If the VDD slew rate is very slow and the slew rate is longer than Tstrt+Td, What is the behavior of nRESET?
I guess the behavior will be either ① or ②. Which one is correct?
①Regardless of the VDD voltage , the nRESET will become High after Tstrt+Td. When the VDD decrease lower than VIT-, the nRESET will become Low.
②nRESET will be stay Low. Once the VDD reaches VIT+ and pass Td, the nRESET become High.
Thanks,
Yuta Kurimoto