UCC21750: OUTH is +15V and -3V.OUTL is -3.3V. Is it right?

Xiaofu,

I dont exactly understand your question.

OUTH is the gate "pullup" to VDD, and OUTL is the pulldown to VEE. OUTH can not drive with both +15V and -3V.

Please see excerpt from the datasheet below.

when pwm input is HIGH: internally there is FETs which turn on to charge the IGBT/FET gate up to VDD, and when PWM goes low, OUTH becomes High-z and OUTL fets turn on, pulling the gate low down to whatever the VEE supply is.

If this answers your question, please press the green button. Let me know if you have more questions.

Best

Dimitri