Hi team,
Please tell me the specifications of UVLO of TPS7A49.
There is a description of UVLO in the block diagram, but the specifications are unknown.
Best Regards,
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Hi team,
Please tell me the specifications of UVLO of TPS7A49.
There is a description of UVLO in the block diagram, but the specifications are unknown.
Best Regards,
Hi Kobayashi-san,
Most of the LDOs have UVLO, but we don't normally provide the specification on the UVLO. For the TPS7A49, the minimum Vin is 3V, and the UVLO should be below 3V.
Regards,
Jason
Hi Jason,
I disagree with your answer.
UVLOs are specified for most LDOs.
Would you please check with the IC designer?
Best Regards,
From one of the other posts on E2E, the UVLO is around 2.5V. What's the concern with the UVLO value in the application?
e2e.ti.com/.../tps7a49-latch-up-condition_output-go-to-zero-instead-of-5-vdc
It is necessary for verification with brownout, but since there is only an ambiguous answer, we will consider changing it.
In the brownout tests, you may start a slow ramp and capture the UVLO_rising and UVLO_falling. I agree with you, some datasheet does have min and max values on this one, but for TPS7A49, there is no production test on UVLO, so we can only get a rough idea on the value using an EVM, but it's likely to see unit-to-unit variation and it may also change during temperatures. Hope it helps.