This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS53647: About PGOOD(VR_RDY)

Part Number: TPS53647

Just take TPS53647 as an example, the principle should be the same.

I came out an interesting question which is worth reflecting on in my aspect, want to learn from experts' ideas.

We know VR_RDY is pulled-up with a resistor to 3.3V to indicate output state, but if this aux 3.3V is supplied separately(different from pin14) and constantly during power-on/power-off, and this 3.3V is also used for on-board SoC supply.

Based on this situation, if I enable the device with V5 ramp-up and ramp-down (5V UVLO and its recovery), are below waveforms correct? If this is correct, SoC need extra efforts to identify which is the "real" high level of VR_RDY, right?