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UCC21750: Error during double pulse test

Part Number: UCC21750

My name is Teruyuki Ohashi from Toshiba corporation.

I'm trying to conduct a double pulse test of a SiC MOSFET module using UCC21750.

When the drain voltage is 400V or less, a clear wave form can be obtained.

However, when the drain boltage is over 400V, the second pulse cannnot be applied.

Is there any protection funtion working?

Regards,

  • Hi Teruyuki,

    It seems like one of the protection features that could be causing the gate driver to shutdown after the first pulse is the short circuit detection through the DESAT pin. Can't be sure without more information:

    • With drain voltage over 400V does the second pulse never appear or does it shutdown earlier than expected?
      • Does the first pulse shutdown earlier than expected or does it follow the IN+ input signal?
    • Would you be able to share the gate driver portion of your schematic to see how the gate driver is configured?(Specify if certain components are not populated when running the double pulse test)
    • Do you have any oscilloscope capture of the double pulse test you could share?
    • A quick test we could run to confirm if the DESAT pin is causing the gate driver to shutdown would be to disable the DESAT feature. This can be done by shorting the DESAT pin to the COM net of the gate driver IC

    Let me know if there's any questions.

    Best regards,

    Andy Robles