• State TI Thinks Resolved
  • Locked Locked
  • Replies 7 replies
  • Answers 3 answers
  • Subscribers 63 subscribers
  • Views 309 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCD90160A: FPWM pins state on reset

Kiran Kumar R
Intellectual 265 points
Part Number: UCD90160A

Hi Team,

we have used UCD90160A power sequencer in our board. we have used FPWM2/GPIO6 pin to enable the one of the regulator which requires active low enable (by default should be high kept regulator off and should go low while enabling the regulator based on sequence). when i tried to configure this in fusion digital power designer tool seting the pin to active low, its shows me a note as : FPWM pins are driven low out of reset as shown below

later i understand that FPWM pins are driven low upon the reset.  My queries are;

1.   If this effect my power sequencing if i go with active low configuation on FPWM2/ GPIO6 pin , If the device  V33A & V33D are maintained above Vreset(2.4V max) and device reset pin (pin 9) is held high to 3.3V avoiding the reset.

2. In any other possibility except V33A & V33D are below Vreset(2.4V) and RESET pin is low, that FPWM pins goes to reset state (low) and effect the sequencing. 

Thanks in Advance,

Kiran

  • 0
    TI__Guru 65610 points

    Hi

    We do not recommend using FPWM for active LOW ENABLE since the power supply may be enabled when the device is under reset and initialization which takes about ~20ms to complete. Except the POR and Hard reset, there is a also  soft reset which is triggered by the PMBus command.

    It is better to change the design to have it fixed.

    Regards

    Yihe 

  • 0 in reply to yihe
    Intellectual 265 points

    Hi Yihe,

    Thanks for the reply, but the board is already developed and its not posible to change the design. So is there any other possible ways to overcome the issue.? any suggestions will be very helpfull.

    Thanks in Advance,

    Kiran

  • 0 in reply to Kiran Kumar R
    TI__Guru 65610 points

    Hi

    Was VIN for those power supply present during the reset of UCD? I do not think there is a way to workaround this without modifying the board? You have to test to see whether it causing any problem for your system. 

    Regards

    Yihe

  • 0 in reply to yihe
    Intellectual 265 points

    Hi Yihe, 

    Yes VIN will be there on those power supply during the reset of UCD. If i delay the VIN to that power supply above 20msec, will this overcome the issue. 

    also 

    yihe said:
    Except the POR and Hard reset, there is a also  soft reset which is triggered by the PMBus command

    i didnt get, the soft reset which is triggered by the PMbus command. can you please little elaborate about this soft reset which is triggered by PMBus command. can i overcome it?, so there will be no any reset except POR.

    --

    Thanks in Advance,

    Kiran 

  • 0 in reply to Kiran Kumar R
    TI__Guru 65610 points

    Hello

    You have to look the data sheet of the POWER SUPPLY IC to see how the IC functions if VIN is not present while EN is asserted. 

    Have you tested the system to see how it works?

    What I want to describe is that there is another case that device will reset. if your system does not issue the SOFT_RESET command, you do not need worry about it.

    Regards

    Yihe

  • 0 in reply to yihe
    Intellectual 265 points

    Hi Yihe,

    We are not yet tested the system to see how it works. Before working on the system we are looking into possible ways to overcome this issue so that it doesnt create any problems. 

    FYI, the power supply IC is TI's LMZ31710RVQT. we are using inhabit function (INH pin) to control the regulator. we ae using the MOSFET to control the INH. The INH control is as shown below.

    The MOSFET is N channel enhancement type. we have a pullup on gate of MOSFET. so initially MOSFET will be turned on connecting INH to ground so regulator will be off. UCD_ZU1_VCC_1V2_EN_N is the active low enable signal coming from UCD FPWM/GPIO pin. so initially UCD_ZU1_VCC_1V2_EN_N will be high keeping regulator off. Based on sequence UCD will enable regulator by making UCD_ZU1_VCC_1V2_EN_N low. 

    Any words on this from you?

    Also our system doesnot issue SOFT_RESET command. 

    Thanks in Advance,

    Kiran 

  • 0 in reply to Kiran Kumar R
    TI__Guru 65610 points

    Hi

    When UCD is under reset and initialization, the UCD_ZU1_VCC_1V2_EN is low to turn on the MOSFET. is there way to change the ENABEL to ACTIVE HIGH so the UCD does not bother?

    Regards

    Yihe