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TPS40304A: DC/DC converter based on TPS40304 experiences erratic OCP hick-ups at temperatures below 0C while working well at room temparatures

Part Number: TPS40304A
Other Parts Discussed in Thread: TPS40304

Hi,

Good Day. I have a customer who is working with TPS40304A. Please see below the query of our customer for your reference. Thank you very much.

We have multiple output power supply consisting of many DC/DC converters each one based on your PWM controller TPS40304. All the outputs are working on separate, (almost purely resistive loads) and have different fixed values from 3V to 5.5V DC, however each DC/DC converter is in fact separate circuit feed by the same DC input. Everything works good at room temperature and on high temperatures however, all of them experience strange behavior working at temperatures below 0C down to -37C. On nominal load the output begin turning off and back on erratically, not synchronized, looking like OCP hick-up mode. Sometimes, the hick-up mode repetition can be reduced or even avoided by easing load conditions (meaning reducing output current, increasing output resistance) and sometimes the issue does not exist, meaning the issue is not 100% repeatable on every output at certain temperature

There is a link to interactive WEBENCH Power Designer in the TPS4030x datasheet. When I took close look onto the design changing working temperature the web tool shows that OCP setup resistor (from pin 9- LDRV/OC to ground) value is changing depending on temperature. Should that resistor be termoresistor?

Best Regards,

Ray Vincent

  •   

    The ILIM resistor value used on the TPS40304 converter is detected and stored at start-up and is not continually sensed during operation, so changing the RILIM resistor to a thermoresistor would not adjust the current limit corresponding to the temperature, so no, it should not be a thermoresistor.

    The reason you are seeing current limit issues at cold temperature that you are not seeing at room or hot temperature is because the internal current sense circuitry is temperature compensated to 3000ppm/°C but the effective Rdson of the high-side or low-side FET which is triggering OC has a lower temperature coefficient.  As a result, the voltage that triggers an over-current is dropping more quickly than the sensed voltage drop across the FETs.  This can also become more sever if the cooling mechanism cools the TPS40304 faster than the MOSFETs.

    Typically, this is addressed by setting the OCP level high enough to account for this difference at the minimum operating temperature and accepting the higher current limit at higher temperature that results from the higher OCP setting.

    Alternately, it may be possible to improve the TC matching if the TC of the Rdson of the Power FETs is 3000ppm/°C but the including of other elements in the current sense path changes their TC resulting in a lower than 3000ppm/°C

    Common contributing factors include:

    Trace resistance / solder resistance between the PGND pin connection of the TPS40304 and the source of the synchronous (Low-Side) FET (low-side FET current limit)

    Trace resistance / solder resistance between the VDD input voltage sense connection and the drain of the control (High-Side) FET (High-side FET current limit)

    Ripple voltage on the high-side FET drain that is not reflected on the VDD voltage (High-side FET current limit)

    Ringing on the falling edge of SW that continues after the TPS40304 blanking time of 150ns. (Low-side FET current limit)