This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LP87524-Q1: suitable for a specific use case?

Part Number: LP87524-Q1
Other Parts Discussed in Thread: LP87524P-Q1


-Can you please confirm that the LP87524-Q1 (4 independant DCDC channels) can be used for this use case?

    Voltage            current (Abs max)     Ambiant temperature : 60°C
+3,3 V   +/-4%            1,9 A               
+1,8 V   +/-4%            0,8 A    
+1,1 V   +/-4%            1,3 A    
+1,0 V   +/-4%            0,9 A    

Since the sum of the current is much below the 10A max are there some ways to optimize the design for this use case (like reducing amount/size of input capacitors or output capacitors)?
Any advises?

-The LP87524B/J/P-Q1 TRM UG - SNVU663A does give the Peak current limit (page 5 tab 3-1) that are programmed in the factory (OTP).
Does it means that at a given point in time:
      the sum of all the Iout cannot not exceed 10A
     the Iout of each DCDC rails cannot exceed this factory programmed limit (ex: ILIM0: 2.5A for DCDC0)

Can you confirm that the pre-programmed sequencing can be changed using I2C by reprogramming the DOUBLE_DELAY bit in CONFIG register and HALF_DELAY bit in PGOOD_CTRL2 register?

Thanks in advance!


  • Hi,

    Do the voltage limits include both DC & AC? If they do then especially 1.1V rail would be borderline with full swing (0-1.3A) transient.

    The output capacitance cannot be reduced since the buck has to be stable. Maybe some PCB layout optimizations can be made but obviously the recommendation is to use as wide as possible traces for the power planes.

    Peak current limit monitors the inductor current. Due to the variations in inductance, tolerance in the current limit itself, switching frequency etc. peak current limit is typically set to be 1A higher than the maximum allowed DC current. Therefore, the combined maximum peak current limits in LP8752x devices are always less than 14A which results in 10A DC current. For example, looking at the SNVU663A, Table 3-1. maximum DC currents drawn from LP87524P-Q1 are 3A, 1.5A, 3A and 2.5A which is 10A in total. In short, DCDC rails must satisfy the peak current limits that have been set to be 14A or lower which will guarantee 10A or less DC current.

    DOUBLE_DELAY and HALF_DELAY can be changed via I2C. Bear in mind that the device will reset to OTP defaults every time the device resets so the changes would have to be written again.

    Best regards,

    Samuli Piispanen