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TPS7A24: The range of output adjustment resistance of TPS7A2401DBVR

user5499232
Prodigy 100 points
Part Number: TPS7A24 
What is the range of output adjustment resistance of TPS7A2401DBVR?

For example, to output around 5.35V
Is it possible to set R1 = 56kΩ and R2 = 16.9kΩ?
(R1 and R2 follow the reference of the circuit described in the data sheet)

In the calculation example of the data sheet, the MΩ level is described for both R1 and R2.
I would like to know if this can be a resistance value of 10kΩ level and if there is no problem.
  • 0
    TI__Mastermind 38115 points

    Hi,

    There is no issue with using resistances at the 10kΩ level. Using resistors near the limit set by Equation 9 in section 8.2.2.2 of the datasheet is mostly to limit the additional quiescent current and power dissipation introduced by the feedback network. You can use resistors at any level less than the limit for slightly improved output accuracy. Of course, if the resistors are too small they can start to use a significant portion of the available output current. 

    Regards,

    Nick

  • 0 in reply to Nick Butts
    Prodigy 100 points

    Thank you for your reply.

    Just in case, I have more questions.

    In "8.1.1 Adjustable Device Feedback Resistors" of the data sheet
    There is the following description and I have a question about this.

    To ignore the FB pin current error term in the VOUT equation, set the feedback divider current to 100x the FB pin
    current listed in the Electrical Characteristics table.
    This setting provides the maximum feedback divider series resistance, as shown in the following equation:
    R1 + R2 ≤ VOUT / (IFB x 100) (3)


    Here it says "set the feedback divider current to 100x the FB pin current"
    Does this mean that a current of about 100 times that of "the FB pin current" is passed through "the feedback divider series resistance"?
    Or
    Does this mean that "the feedback divider series resistance" is 100 times more current than "the FB pin current"?

    If the current is around 100 times, R1 and R2 will be at the MΩ level.
    If it is 100 times or more, R1 and R2 will have no problem even at the 10kΩ level.

  • 0 in reply to user5499232
    TI__Mastermind 38115 points

    I'm not sure I completely understand your question. The description is saying to size the feedback resistors such that the current through them (assuming there is no current into the FB pin) is at least 100x the leakage into the FB pin as specified in the EC table. That would make your first interpretation correct. I am not sure what you mean by your second interpretation.

    Does that answer your question?