Hi Team,
We are trying to follow software development guide to evaluate cell balance function on bq79606-Q1EVM.
Attached is our register settings. We are confused when click "Enable Cell Balance Comparator", CB status is shown as complete immediately.
Cell voltage is ~ 4.2 volts and CB_DONE_THRESH is set to 2.8 volts. Supposedly CB should keep running when cell voltage reach 2.8 volts.
Do we have standard process how to utilize CB_DONE_THRESH to activate balancing function? Kindly point out which settings or process is wrong.
A_BQ79606-setting-Enable.txt
# bq79606-Q1 Register Exports File # File creation date: 2021.07.22 at 14:00:31 TST # # File Format: Register address in hex(tab)Register value in hex(tab). Addtional characters in line ignored for import. # All values are hex not prefixed with 0x and not case sensitive for import. # 0 00 DEVADD_OTP Description: Device Address OTP Default) 1 01 CONFIG Description: Device Configuration) 2 00 GPIO_FLT_MSK Description: GPIO Fault Mask) 3 00 UV_FLT_MSK Description: UV Comparator Fault Mask) 4 00 OV_FLT_MSK Description: OV Comparator Fault Mask) 5 00 UT_FLT_MSK Description: UT Comparator Fault Mask) 6 00 OT_FLT_MSK Description: OT Comparator Fault Status Mask) 7 00 TONE_FLT_MSK Description: FAULT_ Bus Tone Fault Mask) 8 00 COMM_UART_FLT_MSK Description: UART Fault Mask) 9 00 COMM_UART_RC_FLT_MSK Description: UART Receive Command Fault Mask) A 00 COMM_UART_RR_FLT_MSK Description: UART Receive Response Fault Mask) B 04 COMM_UART_TR_FLT_MSK Description: UART Transmit Fault Mask) C 00 COMM_COMH_FLT_MSK Description: COMH Bus Fault Mask) D 00 COMM_COMH_RC_FLT_MSK Description: COMH Receive Command Fault Mask) E 00 COMM_COMH_RR_FLT_MSK Description: COMH Receive Response Fault Mask) F 00 COMM_COMH_TR_FLT_MSK Description: COMH Transmit Fault Mask) 10 00 COMM_COML_FLT_MSK Description: COML Bus Fault Mask) 11 00 COMM_COML_RC_FLT_MSK Description: COML Receive Command Fault Mask) 12 00 COMM_COML_RR_FLT_MSK Description: COML Receive Response Fault Mask) 13 00 COMM_COML_TR_FLT_MSK Description: COML Transmit Fault Mask) 14 00 OTP_FLT_MSK Description: OTP Page Fault Mask) 15 00 RAIL_FLT_MSK Description: Power Rail Fault Mask) 16 00 SYS_FLT1_FLT_MSK Description: System Fault 1 Mask) 17 00 SYS_FLT2_FLT_MSK Description: System Fault 2 Mask) 18 00 SYS_FLT3_FLT_MSK Description: IC System Fault 3 Mask) 19 00 OVUV_BIST_FLT_MSK Description: OVUV BIST Fault Mask) 1A 00 OTUT_BIST_FLT_MSK Description: OTUT BIST Fault Mask) 1B 00 SPARE_01 Description: Spare Register) 1C 00 SPARE_02 Description: Spare Register) 1D 00 SPARE_03 Description: Spare Register) 1E 00 SPARE_04 Description: Spare Register) 1F 00 SPARE_05 Description: Spare Register) 20 3C COMM_CTRL Description: Communication Control) 21 3C DAISY_CHAIN_CTRL Description: Daisy Chain RX/TX Enable Control) 22 00 TX_HOLD_OFF Description: Transmitter Holdoff Control) 23 00 COMM_TO Description: Communication Timeout Control) 24 62 CELL_ADC_CONF1 Description: Cell ADC Configuration 1) 25 08 CELL_ADC_CONF2 Description: Cell ADC Configuration 2) 26 0C AUX_ADC_CONF Description: Auxiliary ADC Configuration) 27 00 ADC_DELAY Description: ADC Configuration) 28 00 GPIO_ADC_CONF Description: GPIO ADC Result Configuration) 29 00 OVUV_CTRL Description: Cell Hardware Protection Channel Control) 2A 32 UV_THRESH Description: Comparator Under Voltage Threshold) 2B 64 OV_THRESH Description: Comparator Over Voltage Threshold) 2C 00 OTUT_CTRL Description: GPIO Over and Under Temperature Comparator Control) 2D 5A OTUT_THRESH Description: Comparator Over Temperature Threshold) 2E 0A COMP_DG Description: Hardware Protection Deglitch) 2F 30 GPIO1_CONF Description: GPIO1 Configuration) 30 30 GPIO2_CONF Description: GPIO2 Configuration) 31 30 GPIO3_CONF Description: GPIO3 Configuration) 32 30 GPIO4_CONF Description: GPIO4 Configuration) 33 30 GPIO5_CONF Description: GPIO5 Configuration) 34 30 GPIO6_CONF Description: GPIO6 Configuration) 35 00 CELL1_GAIN Description: Cell 1 Gain Calibration) 36 00 CELL2_GAIN Description: Cell 2 Gain Calibration) 37 00 CELL3_GAIN Description: Cell 3 Gain Calibration) 38 00 CELL4_GAIN Description: Cell 4 Gain Calibration) 39 00 CELL5_GAIN Description: Cell 5 Gain Calibration) 3A 00 CELL6_GAIN Description: Cell 6 Gain Calibration) 3B 00 CELL1_OFF Description: Cell 1 Offset Calibration) 3C 00 CELL2_OFF Description: Cell 2 Offset Calibration) 3D 00 CELL3_OFF Description: Cell 3 Offset Calibration) 3E 00 CELL4_OFF Description: Cell 4 Offset Calibration) 3F 00 CELL5_OFF Description: Cell 5 Offset Calibration) 40 00 CELL6_OFF Description: Cell 6 Offset Calibration) 41 00 GPIO1_GAIN Description: GPIO1 Gain Calibration) 42 00 GPIO2_GAIN Description: GPIO2 Gain Calibration) 43 00 GPIO3_GAIN Description: GPIO3 Gain Calibration) 44 00 GPIO4_GAIN Description: GPIO4 Gain Calibration) 45 00 GPIO5_GAIN Description: GPIO5 Gain Calibration) 46 00 GPIO6_GAIN Description: GPIO6 Gain Calibration) 47 00 GPIO1_OFF Description: GPIO1 Offset Calibration) 48 00 GPIO2_OFF Description: GPIO2 Offset Calibration) 49 00 GPIO3_OFF Description: GPIO3 Offset Calibration) 4A 00 GPIO4_OFF Description: GPIO4 Offset Calibration) 4B 00 GPIO5_OFF Description: GPIO5 Offset Calibration) 4C 00 GPIO6_OFF Description: GPIO6 Offset Calibration) 4D 00 GPAUXCELL_GAIN Description: "GP ADC Offset, CH1") 4E 00 GPAUXCELL_OFF Description: "GP ADC Offset, CH1") 4F 00 GPAUX_GAIN Description: "GP ADC Offset, CH2-32") 50 00 GPAUX_OFF Description: "GP ADC Offset, CH2-32") 51 F2 VC1COEFF1 Description: Cell 1 ADC Gain Correction) 52 7E VC1COEFF2 Description: Cell 1 ADC Gain Correction) 53 F1 VC1COEFF3 Description: Cell 1 ADC Gain Correction) 54 5F VC1COEFF4 Description: Cell 1 ADC Gain Correction) 55 F1 VC1COEFF5 Description: Cell 1 ADC Gain Correction) 56 07 VC1COEFF6 Description: Cell 1 ADC Gain Correction) 57 00 VC1COEFF7 Description: Cell 1 ADC Gain Correction) 58 00 VC1COEFF8 Description: Cell 1 ADC Gain Correction) 59 10 VC1COEFF9 Description: Cell 1 ADC Offset/ Gain Correction) 5A F3 VC1COEFF10 Description: Cell 1 ADC Offset Correction) 5B CB VC1COEFF11 Description: Cell 1 ADC Offset Correction) 5C 09 VC1COEFF12 Description: Cell 1 ADC Offset Correction) 5D E0 VC1COEFF13 Description: Cell 1 ADC Offset Correction) 5E 03 VC1COEFF14 Description: Cell 1 ADC Offset Correction) 5F 7B VC2COEFF1 Description: Cell 2 ADC Gain Correction) 60 00 VC2COEFF2 Description: Cell 2 ADC Gain Correction) 61 EA VC2COEFF3 Description: Cell 2 ADC Gain Correction) 62 7F VC2COEFF4 Description: Cell 2 ADC Gain Correction) 63 F0 VC2COEFF5 Description: Cell 2 ADC Gain Correction) 64 07 VC2COEFF6 Description: Cell 2 ADC Gain Correction) 65 00 VC2COEFF7 Description: Cell 2 ADC Gain Correction) 66 00 VC2COEFF8 Description: Cell 2 ADC Gain Correction) 67 C0 VC2COEFF9 Description: Cell 2 ADC Offset/ Gain Correction) 68 F4 VC2COEFF10 Description: Cell 2 ADC Offset Correction) 69 A7 VC2COEFF11 Description: Cell 2 ADC Offset Correction) 6A 45 VC2COEFF12 Description: Cell 2 ADC Offset Correction) 6B F4 VC2COEFF13 Description: Cell 2 ADC Offset Correction) 6C 03 VC2COEFF14 Description: Cell 2 ADC Offset Correction) 6D 99 VC3COEFF1 Description: Cell 3 ADC Gain Correction) 6E 00 VC3COEFF2 Description: Cell 3 ADC Gain Correction) 6F 01 VC3COEFF3 Description: Cell 3 ADC Gain Correction) 70 60 VC3COEFF4 Description: Cell 3 ADC Gain Correction) 71 EE VC3COEFF5 Description: Cell 3 ADC Gain Correction) 72 07 VC3COEFF6 Description: Cell 3 ADC Gain Correction) 73 00 VC3COEFF7 Description: Cell 3 ADC Gain Correction) 74 00 VC3COEFF8 Description: Cell 3 ADC Gain Correction) 75 00 VC3COEFF9 Description: Cell 3 ADC Offset/ Gain Correction) 76 EF VC3COEFF10 Description: Cell 3 ADC Offset Correction) 77 03 VC3COEFF11 Description: Cell 3 ADC Offset Correction) 78 C6 VC3COEFF12 Description: Cell 3 ADC Offset Correction) 79 F1 VC3COEFF13 Description: Cell 3 ADC Offset Correction) 7A 03 VC3COEFF14 Description: Cell 3 ADC Offset Correction) 7B D3 VC4COEFF1 Description: Cell 4 ADC Gain Correction) 7C 7F VC4COEFF2 Description: Cell 4 ADC Gain Correction) 7D EC VC4COEFF3 Description: Cell 4 ADC Gain Correction) 7E 1F VC4COEFF4 Description: Cell 4 ADC Gain Correction) 7F F1 VC4COEFF5 Description: Cell 4 ADC Gain Correction) 80 07 VC4COEFF6 Description: Cell 4 ADC Gain Correction) 81 00 VC4COEFF7 Description: Cell 4 ADC Gain Correction) 82 00 VC4COEFF8 Description: Cell 4 ADC Gain Correction) 83 D0 VC4COEFF9 Description: Cell 4 ADC Offset/ Gain Correction) 84 FE VC4COEFF10 Description: Cell 4 ADC Offset Correction) 85 4F VC4COEFF11 Description: Cell 4 ADC Offset Correction) 86 85 VC4COEFF12 Description: Cell 4 ADC Offset Correction) 87 F6 VC4COEFF13 Description: Cell 4 ADC Offset Correction) 88 03 VC4COEFF14 Description: Cell 4 ADC Offset Correction) 89 91 VC5COEFF1 Description: Cell 5 ADC Gain Correction) 8A 00 VC5COEFF2 Description: Cell 5 ADC Gain Correction) 8B F1 VC5COEFF3 Description: Cell 5 ADC Gain Correction) 8C 5F VC5COEFF4 Description: Cell 5 ADC Gain Correction) 8D EF VC5COEFF5 Description: Cell 5 ADC Gain Correction) 8E 07 VC5COEFF6 Description: Cell 5 ADC Gain Correction) 8F 00 VC5COEFF7 Description: Cell 5 ADC Gain Correction) 90 00 VC5COEFF8 Description: Cell 5 ADC Gain Correction) 91 50 VC5COEFF9 Description: Cell 5 ADC Offset/ Gain Correction) 92 F8 VC5COEFF10 Description: Cell 5 ADC Offset Correction) 93 47 VC5COEFF11 Description: Cell 5 ADC Offset Correction) 94 44 VC5COEFF12 Description: Cell 5 ADC Offset Correction) 95 02 VC5COEFF13 Description: Cell 5 ADC Offset Correction) 96 00 VC5COEFF14 Description: Cell 5 ADC Offset Correction) 97 F5 VC6COEFF1 Description: Cell 6 ADC Gain Correction) 98 7F VC6COEFF2 Description: Cell 6 ADC Gain Correction) 99 F5 VC6COEFF3 Description: Cell 6 ADC Gain Correction) 9A 3F VC6COEFF4 Description: Cell 6 ADC Gain Correction) 9B ED VC6COEFF5 Description: Cell 6 ADC Gain Correction) 9C 07 VC6COEFF6 Description: Cell 6 ADC Gain Correction) 9D 00 VC6COEFF7 Description: Cell 6 ADC Gain Correction) 9E 00 VC6COEFF8 Description: Cell 6 ADC Gain Correction) 9F 20 VC6COEFF9 Description: Cell 6 ADC Offset/ Gain Correction) A0 F9 VC6COEFF10 Description: Cell 6 ADC Offset Correction) A1 7F VC6COEFF11 Description: Cell 6 ADC Offset Correction) A2 43 VC6COEFF12 Description: Cell 6 ADC Offset Correction) A3 FF VC6COEFF13 Description: Cell 6 ADC Offset Correction) A4 03 VC6COEFF14 Description: Cell 6 ADC Offset Correction) A5 7E VAUXCOEFF1 Description: GP ADC Gain Correction - CH2-32) A6 7F VAUXCOEFF2 Description: GP ADC Gain Correction - CH2-32) A7 DF VAUXCOEFF3 Description: GP ADC Gain Correction - CH2-32) A8 9F VAUXCOEFF4 Description: GP ADC Gain Correction - CH2-32) A9 F3 VAUXCOEFF5 Description: GP ADC Gain Correction - CH2-32) AA 07 VAUXCOEFF6 Description: GP ADC Gain Correction - CH2-32) AB 00 VAUXCOEFF7 Description: GP ADC Gain Correction - CH2-32) AC 00 VAUXCOEFF8 Description: GP ADC Gain Correction - CH2-32) AD 90 VAUXCOEFF9 Description: GP ADC Offset Correction - CH2-32) AE E8 VAUXCOEFF10 Description: GP ADC Offset Correction - CH2-32) AF 2F VAUXCOEFF11 Description: GP ADC Offset Correction - CH2-32) B0 86 VAUXCOEFF12 Description: GP ADC Offset Correction - CH2-32) B1 EE VAUXCOEFF13 Description: GP ADC Offset Correction - CH2-32) B2 03 VAUXCOEFF14 Description: GP ADC Offset Correction) B3 7F VAUXCELLCOEFF1 Description: GP ADC Gain Correction - CH1) B4 7F VAUXCELLCOEFF2 Description: GP ADC Gain Correction - CH1) B5 D6 VAUXCELLCOEFF3 Description: GP ADC Gain Correction - CH1) B6 BF VAUXCELLCOEFF4 Description: GP ADC Gain Correction - CH1) B7 F0 VAUXCELLCOEFF5 Description: GP ADC Gain Correction - CH1) B8 07 VAUXCELLCOEFF6 Description: GP ADC Gain Correction - CH1) B9 00 VAUXCELLCOEFF7 Description: GP ADC Gain Correction - CH1) BA 00 VAUXCELLCOEFF8 Description: GP ADC Gain Correction - CH1) BB 90 VAUXCELLCOEFF9 Description: GP ADC Offset/ Gain Correction - CH1) BC E4 VAUXCELLCOEFF10 Description: GP ADC Offset Correction - CH1) BD 33 VAUXCELLCOEFF11 Description: GP ADC Offset Correction - CH1) BE 84 VAUXCELLCOEFF12 Description: GP ADC Offset Correction - CH1) BF FB VAUXCELLCOEFF13 Description: GP ADC Offset Correction - CH1) C0 03 VAUXCELLCOEFF14 Description: GP ADC Offset Correction - CH1) C1 02 SPARE_6 Description: Spare Register) C2 00 CUST_MISC1 Description: Customer OTP Memory 1) C3 00 CUST_MISC2 Description: Customer OTP Memory 2) C4 00 CUST_MISC3 Description: Customer OTP Memory 3) C5 00 CUST_MISC4 Description: Customer OTP Memory 4) C6 D2 CUST_CRCH Description: Customer CRC High Byte) C7 5A CUST_CRCL Description: Customer CRC Low Byte) 100 00 OTP_PROG_UNLOCK1A Description: OTP Program Unlock Code 1A) 101 00 OTP_PROG_UNLOCK1B Description: OTP Program Unlock Code 1B) 102 00 OTP_PROG_UNLOCK1C Description: OTP Program Unlock Code 1C) 103 00 OTP_PROG_UNLOCK1D Description: OTP Program Unlock Code 1D) 104 00 DEVADD_USR Description: Programmable Device Address) 105 00 CONTROL1 Description: Device Control) 106 00 CONTROL2 Description: Function Enable Control) 107 00 OTP_PROG_CTRL Description: OTP Programming Control) 108 00 GPIO_OUT Description: GPIO Output Control) 109 00 CELL_ADC_CTRL Description: Cell ADC Control) 10A 00 AUX_ADC_CTRL1 Description: Auxiliary ADC Control 1) 10B 00 AUX_ADC_CTRL2 Description: Auxiliary ADC Control 3) 10C 00 AUX_ADC_CTRL3 Description: Auxiliary ADC Control 4) 10D 1A CB_CONFIG Description: Balance Timer Configuration) 10E 01 CB_CELL1_CTRL Description: Cell 1 Balance Timer Configuration) 10F 01 CB_CELL2_CTRL Description: Cell 2 Balance Timer Configuration) 110 01 CB_CELL3_CTRL Description: Cell 3 Balance Timer Configuration) 111 00 CB_CELL4_CTRL Description: Cell 4 Balance Timer Configuration) 112 00 CB_CELL5_CTRL Description: Cell 5 Balance Timer Configuration) 113 00 CB_CELL6_CTRL Description: Cell 6 Balance Timer Configuration) 114 40 CB_DONE_THRESH Description: Cell Balance Done Comparator Threshold) 115 00 CB_SW_EN Description: Cell Balancing Manual Switch Enable) 116 00 DIAG_CTRL1 Description: Diagnostic Control Register 1) 117 00 DIAG_CTRL2 Description: Diagnostic Control Register 2) 118 00 DIAG_CTRL3 Description: Diagnostic Control Register 3) 119 00 DIAG_CTRL4 Description: Diagnostic Control Register 4) 11A 00 VC_CS_CTRL Description: VC Current Source/Sink Control) 11B 00 CB_CS_CTRL Description: CB Current Source/Sink Control) 11C 00 CBVC_COMP_CTRL Description: CB Switch Comparator Control) 11D 00 ECC_TEST Description: ECC Test) 11E 00 ECC_DATAIN0 Description: 1st Data In Byte for Manual ECC Test) 11F 00 ECC_DATAIN1 Description: 2nd Data In Byte for Manual ECC Test) 120 00 ECC_DATAIN2 Description: 3rd Data In Byte for Manual ECC Test) 121 00 ECC_DATAIN3 Description: 4th Data In Byte for Manual ECC Test) 122 00 ECC_DATAIN4 Description: 5th Data In Byte for Manual ECC Test) 123 00 ECC_DATAIN5 Description: 6th Data In Byte for Manual ECC Test) 124 00 ECC_DATAIN6 Description: 7th Data In Byte for Manual ECC Test) 125 00 ECC_DATAIN7 Description: 8th Data In Byte for Manual ECC Test) 126 00 ECC_DATAIN8 Description: 9th Data In Byte for Manual ECC Test) 127 00 GPIO_FLT_RST Description: GPIO Fault Reset) 128 00 UV_FLT_RST Description: UV Comparator Fault Reset) 129 00 OV_FLT_RST Description: OV Comparator Fault Status Reset) 12A 00 UT_FLT_RST Description: UT Comparator Fault Status) 12B 00 OT_FLT_RST Description: OT Comparator Fault Status) 12C 00 TONE_FLT_RST Description: FAULT_ Bus Status Reset) 12D 00 COMM_UART_FLT_RST Description: UART Fault Status Reset) 12E 00 COMM_UART_RC_FLT_RST Description: UART Receive Command Fault Reset) 12F 00 COMM_UART_RR_FLT_RST Description: UART Receive Response Fault Reset) 130 00 COMM_UART_TR_FLT_RST Description: UART Transmit Fault Reset) 131 00 COMM_COMH_FLT_RST Description: COMH Bus Fault Reset) 132 00 COMM_COMH_RC_FLT_RST Description: COMH Receive Command Fault Reset) 133 00 COMM_COMH_RR_FLT_RST Description: COMH Receive Response Fault Reset) 134 00 COMM_COMH_TR_FLT_RST Description: COMH Transmit Fault Reset) 135 00 COMM_COML_FLT_RST Description: COML Bus Fault Reset) 136 00 COMM_COML_RC_FLT_RST Description: COML Receive Command Fault Reset) 137 00 COMM_COML_RR_FLT_RST Description: COML Receive Response Fault Reset) 138 00 COMM_COML_TR_FLT_RST Description: COML Transmit Fault Reset) 139 00 OTP_FLT_RST Description: OTP Page Fault Reset) 13A 00 RAIL_FLT_RST Description: Power Rail Fault Reset) 13B 00 SYS_FLT1_RST Description: System Fault 1 Reset) 13C 00 SYS_FLT2_RST Description: System Fault 2 Reset) 13D 00 SYS_FLT3_RST Description: IC System Fault 3 Reset) 13E 00 OVUV_BIST_FLT_RST Description: OVUV BIST Reset) 13F 00 OTUT_BIST_FLT_RST Description: OTUT BIST Reset) 150 00 OTP_PROG_UNLOCK2A Description: OTP Program Unlock Code 2A) 151 00 OTP_PROG_UNLOCK2B Description: OTP Program Unlock Code 2B) 152 00 OTP_PROG_UNLOCK2C Description: OTP Program Unlock Code 2C) 153 00 OTP_PROG_UNLOCK2D Description: OTP Program Unlock Code 2D) 154 10 SPI_CFG Description: SPI Master Configuration) 155 00 SPI_TX Description: SPI Byte to Transmit) 156 00 SPI_EXE Description: SPI Command Execute) 200 04 PARTID Description: Customer Revision Information) 201 01 SYS_FAULT1 Description: System Fault 1 Status) 202 01 SYS_FAULT2 Description: System Fault 2 Status) 203 00 SYS_FAULT3 Description: IC System Fault 3 Status) 204 C0 DEV_STAT Description: Device Status) 205 00 LOOP_STAT Description: Round Robin Status) 206 18 FAULT_SUMMARY Description: Fault Summary) 207 80 VCELL1_HF Description: Cell 1 Voltage High Byte(Low Pass Filtered)) 208 00 VCELL1_LF Description: Cell 1 Voltage Low Byte (Low Pass Filtered)) 209 80 VCELL2_HF Description: Cell 3 Voltage High Byte (Low Pass Filtered)) 20A 00 VCELL2_LF Description: Cell 2 Voltage Low Byte (Low Pass Filtered)) 20B 80 VCELL3_HF Description: Cell 3 Voltage High Byte (Low Pass Filtered)) 20C 00 VCELL3_LF Description: Cell 3 Voltage Low Byte (Low Pass Filtered)) 20D 80 VCELL4_HF Description: Cell 4 Voltage High Byte (Low Pass Filtered)) 20E 00 VCELL4_LF Description: Cell 4 Voltage Low Byte (Low Pass Filtered)) 20F 80 VCELL5_HF Description: Cell 5 Voltage High Byte (Low Pass Filtered)) 210 00 VCELL5_LF Description: Cell 5 Voltage Low Byte (Low Pass Filtered)) 211 80 VCELL6_HF Description: Cell 6 Voltage High Byte (Low Pass Filtered)) 212 00 VCELL6_LF Description: Cell 6 Voltage Low Byte (Low Pass Filtered)) 213 00 CONV_CNTH Description: Cell ADC Conversion Counter High Byte) 214 00 CONV_CNTL Description: Cell ADC Conversion Counter Low Byte) 215 80 VCELL1H Description: Cell 1 Voltage High Byte (Corrected)) 216 00 VCELL1L Description: Cell 1 Voltage Low Byte (Corrected)) 217 80 VCELL2H Description: Cell 3 Voltage High Byte (Corrected)) 218 00 VCELL2L Description: Cell 2 Voltage Low Byte (Corrected)) 219 80 VCELL3H Description: Cell 3 Voltage High Byte (Corrected)) 21A 00 VCELL3L Description: Cell 3 Voltage Low Byte (Corrected)) 21B 80 VCELL4H Description: Cell 4 Voltage High Byte (Corrected)) 21C 00 VCELL4L Description: Cell 4 Voltage Low Byte (Corrected)) 21D 80 VCELL5H Description: Cell 5 Voltage High Byte (Corrected)) 21E 00 VCELL5L Description: Cell 5 Voltage Low Byte (Corrected)) 21F 80 VCELL6H Description: Cell 6 Voltage High Byte (Corrected)) 220 00 VCELL6L Description: Cell 6 Voltage Low Byte (Corrected)) 221 80 VCELL_FACTCORRH Description: Selected Cell Factory Corrected High Byte) 222 00 VCELL_FACTCORRL Description: Selected Cell Factory Corrected Low Byte) 223 80 AUX_CELLH Description: AUX Cell Measurement Voltage Low Byte) 224 00 AUX_CELLL Description: AUX Cell Measurement Voltage Low Byte) 225 80 AUX_BATH Description: Cell Stack Voltage High (Corrected)) 226 00 AUX_BATL Description: Cell Stack Voltage Low (Corrected)) 227 80 AUX_REF2H Description: Bandgap 1 Voltage Output High Byte) 228 00 AUX_REF2L Description: Bandgap 1 Voltage Output Low Byte) 229 80 AUX_ZEROH Description: ZERO Reference Voltage High Byte) 22A 00 AUX_ZEROL Description: ZERO Reference Voltage Low Byte) 22B 80 AUX_AVDDH Description: AVDD LDO Voltage Output) 22C 00 AUX_AVDDL Description: AVDD LDO Voltage Output Low Byte) 22D 80 AUX_GPIO1H Description: GPIO1 Voltage High (Corrected)) 22E 00 AUX_GPIO1L Description: GPIO1 Voltage Low (Corrected)) 22F 80 AUX_GPIO2H Description: GPIO2 Voltage High (Corrected)) 230 00 AUX_GPIO2L Description: GPIO2 Voltage Low (Corrected)) 231 80 AUX_GPIO3H Description: GPIO3 Voltage High (Corrected)) 232 00 AUX_GPIO3L Description: GPIO3 Voltage Low (Corrected)) 233 80 AUX_GPIO4H Description: GPIO4 Voltage High (Corrected)) 234 00 AUX_GPIO4L Description: GPIO4 Voltage Low (Corrected)) 235 80 AUX_GPIO5H Description: GPIO5 Voltage High (Corrected)) 236 00 AUX_GPIO5L Description: GPIO5 Voltage Low (Corrected)) 237 80 AUX_GPIO6H Description: GPIO6 Voltage High (Corrected)) 238 00 AUX_GPIO6L Description: GPIO6 Voltage Low (Corrected)) 239 80 AUX_FACTCORRH Description: Selected GPIO Factory Corrected High Byte) 23A 00 AUX_FACTCORRL Description: Selected GPIO Factory Corrected Low Byte) 23B 80 DIE_TEMPH Description: Die Junction Temperature High Byte) 23C 00 DIE_TEMPL Description: Die Junction Temperature Low Byte) 23D 80 AUX_REF3H Description: Bandgap 2 Voltage Output High Byte) 23E 00 AUX_REF3L Description: Bandgap 2 Voltage Output Low Byte) 23F 80 AUX_OV_DACH Description: OV Reference Voltage High Byte) 240 00 AUX_OV_DACL Description: OV Reference Voltage Low Byte) 241 80 AUX_UV_DACH Description: UV Reference Voltage High Byte) 242 00 AUX_UV_DACL Description: UV Reference Voltage Low Byte) 243 80 AUX_OT_DACH Description: OT Reference Voltage High Byte) 244 00 AUX_OT_DACL Description: OT Reference Voltage Low Byte) 245 80 AUX_UT_DACH Description: UT Reference Voltage High Byte) 246 00 AUX_UT_DACL Description: UT Reference Voltage Low Byte) 247 80 AUX_TWARN_PTATH Description: TWARN PTAT Current High Byte) 248 00 AUX_TWARN_PTATL Description: TWARN PTAT Current Low Byte) 249 80 AUX_DVDDH Description: DVDD LDO Voltage Output High Byte) 24A 00 AUX_DVDDL Description: DVDD LDO Voltage Output Low Byte) 24B 80 AUX_TSREFH Description: TSREF Voltage Output High Byte) 24C 00 AUX_TSREFL Description: TSREF Voltage Output Low Byte) 24D 80 AUX_CVDDH Description: CVDD LDO Voltage Output High Byte) 24E 00 AUX_CVDDL Description: CVDD LDO Voltage Output Low Byte) 24F 80 AUX_AVAOH Description: AVAO Reference Voltage High Byte) 250 00 AUX_AVAOL Description: AVAO Reference Voltage Low Byte) 260 00 SPI_RX Description: SPI Byte Read) 261 3F CB_DONE Description: Cell Balancing Complete Status) 262 00 GPIO_STAT Description: GPIO Input Status) 263 00 CBVC_COMP_STAT Description: CBVC Comparator Status) 264 00 CBVC_VCLOW_STAT Description: CBVC VCLOW Comparator Status) 265 00 COMM_UART_RC_STAT3 Description: Discarded UART Command Frame Counter) 266 00 COMM_COML_RC_STAT3 Description: Discarded COML Command Frame Counter) 267 00 COMM_COMH_RR_STAT3 Description: Discarded COMH Response Frame Counter) 268 00 COMM_COML_RR_STAT3 Description: Discarded COML Response Frame Counter) 269 00 COMM_COMH_RC_STAT3 Description: Discarded COMH Command Frame Counter) 26A 00 COMM_UART_RR_STAT3 Description: Discarded UART Response Frame Counter) 26B 00 COMM_UART_RC_STAT1 Description: Valid UART Command Frame Counter High Byte) 26C 2D COMM_UART_RC_STAT2 Description: Valid UART Command Frame Counter Low Byte) 26D 00 COMM_COML_RC_STAT1 Description: Valid COML Command Frame Counter High Byte) 26E 00 COMM_COML_RC_STAT2 Description: Valid COML Command Frame Counter Low Byte) 26F 00 COMM_COMH_RR_STAT1 Description: Valid COMH Response Frame Counter High Byte) 270 00 COMM_COMH_RR_STAT2 Description: Valid COMH Response Frame Counter Low Byte) 271 00 COMM_UART_TR_STAT1 Description: Transmitted UART Response Frame Counter High Byte) 272 1E COMM_UART_TR_STAT2 Description: Transmitted UART Response Frame Counter Low Byte) 273 00 COMM_COML_TR_STAT1 Description: Transmitted COML Response Frame Counter High Byte) 274 00 COMM_COML_TR_STAT2 Description: Transmitted COML Response Frame Counter Low Byte) 275 00 COMM_COMH_RC_STAT1 Description: Valid COMH Command Frame Counter High Byte) 276 00 COMM_COMH_RC_STAT2 Description: Valid COMH Command Frame Counter Low Byte) 277 00 COMM_COML_RR_STAT1 Description: Valid COML Response Frame Counter High Byte) 278 00 COMM_COML_RR_STAT2 Description: Valid COML Response Frame Counter Low Byte) 279 00 COMM_COMH_TR_STAT1 Description: Transmitted COMH Response Frame Counter High Byte) 27A 00 COMM_COMH_TR_STAT2 Description: Transmitted COMH Response Frame Counter Low Byte) 27B 00 COMM_UART_RR_STAT1 Description: Valid UART Response Frame Counter High Byte) 27C 00 COMM_UART_RR_STAT2 Description: Valid UART Response Frame Counter Low Byte) 27D 00 OTP_PROG_STAT Description: OTP Programming Status) 27E 01 OTP_CUST1_STAT1 Description: Customer OTP Page 1 Status) 27F 00 OTP_CUST1_STAT2 Description: Customer OTP Page 1 Programming Status) 280 01 OTP_CUST2_STAT1 Description: Customer OTP Page 2 Status) 281 00 OTP_CUST2_STAT2 Description: Customer OTP Page 2 Programming Status) 282 00 CB_SW_STAT Description: Cell Balancing Switch Status) 290 00 GPIO_FAULT Description: GPIO Fault Status) 291 00 UV_FAULT Description: UV Comparator Fault Status) 292 00 OV_FAULT Description: OV Comparator Fault Status) 293 00 UT_FAULT Description: UT Comparator Fault Status) 294 00 OT_FAULT Description: OT Comparator Fault Status) 295 00 TONE_FAULT Description: FAULT Bus Status) 296 05 COMM_UART_FAULT Description: UART Fault Status) 297 00 COMM_UART_RC_FAULT Description: UART Receive Command Fault Status) 298 00 COMM_UART_RR_FAULT Description: UART Receive Response Fault Status (only valid in multidrop mode)) 299 00 COMM_UART_TR_FAULT Description: UART Transmit Fault Status) 29A 00 COMM_COMH_FAULT Description: COMH Fault Status) 29B 00 COMM_COMH_RC_FAULT Description: COMH Receive Command Fault Status) 29C 00 COMM_COMH_RR_FAULT Description: COMH Receive Response Fault Status) 29D 00 COMM_COMH_TR_FAULT Description: COMH Transmit Fault Status) 29E 00 COMM_COML_FAULT Description: COML Fault Status) 29F 00 COMM_COML_RC_FAULT Description: COML Receive Command Fault Status) 2A0 00 COMM_COML_RR_FAULT Description: COML Receive Response Fault Status) 2A1 00 COMM_COML_TR_FAULT Description: COML Transmit Fault Status) 2A2 00 OTP_FAULT Description: OTP Page Fault Status) 2A3 00 RAIL_FAULT Description: Power Rail Fault Status) 2A4 00 OVUV_BIST_FAULT Description: OTUT BIST Fault Status) 2A5 00 OTUT_BIST_FAULT Description: OTUT BIST Fault Status) 2B0 00 ECC_DATAOUT0 Description: 1st Data Out Byte for ECC Test) 2B1 00 ECC_DATAOUT1 Description: 2nd Data Out Byte for ECC Test) 2B2 00 ECC_DATAOUT2 Description: 3rd Data Out Byte for ECC Test) 2B3 00 ECC_DATAOUT3 Description: 4th Data Out Byte for ECC Test) 2B4 00 ECC_DATAOUT4 Description: 5th Data Out Byte for ECC Test) 2B5 00 ECC_DATAOUT5 Description: 6th Data Out Byte for ECC Test) 2B6 00 ECC_DATAOUT6 Description: 7th Data Out Byte for ECC Test) 2B7 00 ECC_DATAOUT7 Description: 8th Data Out Byte for ECC Test) 2B8 00 ECC_DATAOUT8 Description: 9th Data Out Byte for ECC Test) 2B9 00 SEC_BLK Description: SEC Detected Block) 2BA 00 DED_BLK Description: DED Detected Block) 2BB 00 DEV_ADD_STAT Description: Device Address Status) 2BC 03 COMM_STAT Description: Communication Status Register) 2BD 13 DAISY_CHAIN_STAT Description: Communication Status Register) 2C0 80 VCELL1_HU Description: Cell 1 Voltage High Byte (Uncorrected)) 2C1 00 VCELL1_MU Description: Cell 1 Voltage Middle Byte (Uncorrected)) 2C2 00 VCELL1_LU Description: Cell 1 Voltage Low Byte (Uncorrected)) 2C3 80 VCELL2_HU Description: Cell 3 Voltage High Byte (Uncorrected)) 2C4 00 VCELL2_MU Description: Cell 2 Voltage Middle Byte (Uncorrected)) 2C5 00 VCELL2_LU Description: Cell 2 Voltage Low Byte (Uncorrected)) 2C6 80 VCELL3_HU Description: Cell 3 Voltage High Byte (Uncorrected)) 2C7 00 VCELL3_MU Description: Cell 3 Voltage Middle Byte (Uncorrected)) 2C8 00 VCELL3_LU Description: Cell 3 Voltage Low Byte (Uncorrected)) 2C9 80 VCELL4_HU Description: Cell 4 Voltage High Byte(Uncorrected)) 2CA 00 VCELL4_MU Description: Cell 4 Voltage Middle Byte (Uncorrected)) 2CB 00 VCELL4_LU Description: Cell 4 Voltage Low Byte (Uncorrected)) 2CC 80 VCELL5_HU Description: Cell 5 Voltage High (Uncorrected)) 2CD 00 VCELL5_MU Description: Cell 5 Voltage Middle Byte (Uncorrected)) 2CE 00 VCELL5_LU Description: Cell 5 Voltage Low Byte (Uncorrected)) 2CF 80 VCELL6_HU Description: Cell 6 Voltage High Byte(Uncorrected)) 2D0 00 VCELL6_MU Description: Cell 6 Voltage Middle Byte (Uncorrected)) 2D1 00 VCELL6_LU Description: Cell 6 Voltage Low Byte(Uncorrected)) 2D2 80 AUX_BAT_HU Description: Cell Stack Voltage High (Uncorrected)) 2D3 00 AUX_BAT_LU Description: Cell Stack Voltage Low(Uncorrected)) 2D4 80 AUX_GPIO1_HU Description: GPIO1 Voltage High (Uncorrected)) 2D5 00 AUX_GPIO1_MU Description: GPIO1 Voltage Middle Byte (Uncorrected)) 2D6 00 AUX_GPIO1_LU Description: GPIO1 Voltage Low (Uncorrected)) 2D7 80 AUX_GPIO2_HU Description: GPIO2 Voltage High (Uncorrected)) 2D8 00 AUX_GPIO2_LU Description: GPIO2 Voltage Low (Uncorrected)) 2D9 80 AUX_GPIO3_HU Description: GPIO3 Voltage High (Uncorrected)) 2DA 00 AUX_GPIO3_LU Description: GPIO3 Voltage Low (Uncorrected)) 2DB 80 AUX_GPIO4_HU Description: GPIO4 Voltage High (Uncorrected)) 2DC 00 AUX_GPIO4_LU Description: GPIO4 Voltage Low (Uncorrected)) 2DD 80 AUX_GPIO5_HU Description: GPIO5 Voltage High (Uncorrected)) 2DE 00 AUX_GPIO5_LU Description: GPIO5 Voltage Low (Uncorrected)) 2DF 80 AUX_GPIO6_HU Description: GPIO6 Voltage High (Uncorrected)) 2E0 00 AUX_GPIO6_LU Description: GPIO6 Voltage Low Byte (Uncorrected)) 2E1 91 CUST_CRC_RSLTH Description: Calculated Customer CRC Result High Byte) 2E2 71 CUST_CRC_RSLTL Description: Calculated Customer CRC Result Low Byte)
