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LM76003-Q1: Input capacitance in LM76003 driver (datasheet design examples & simulation)

Aaron_Rangel
Intellectual 440 points
Part Number: LM76003-Q1

Hello,

I am designing a dc-dc converter with part LM76003QRNPRQ1 and after reviewing datasheet and simulator results I do not understand well input capacitors selection criteria.

According to the datasheet it is required a input capacitance for decoupling from 10uF to 22uF (taking into account dielectric and also derating capacitance).

But after I perform the simulation of my design I only see two capacitors in parallel of 4,7uF whose derating at input voltage make them to be about 2uF each.

Simulations seems to be Ok and match with the selected values according to the formulas.

I have also checked the example of the datasheet and it includes two 4,7uF in paralllel. Also the same case for the eval board in the whole input voltage range of the device.

I attach the simulation generated file for your checking and also some captures to show evidence about what I am talking about.

Although I've got experience on this and I know that a minimum input capacitance is always required, that makes me feel confused very often.

So, what is really the minimum capacitance required to be added in the input of this driver according to my design (input voltage 44V, output voltage 12V?


Regards,

Aaron

WBDesign74.pdf

  • 0
    TI__Guru 70845 points

    Hello

    The input capacitance is used to provide a low impedance to the input of the regulator for the large pulse currents.

    This keeps the input to the regulator as constant as possible.

    The recommendation in the data sheet is meant to cover cases where the input supply may have high resistance and/or inductance

    that would interfere with the normal operation of the device.

    You may find in a particular case that you can use a smaller input capacitor than is recommended, but if your conditions change,

    it may not work as well as expected.

    We suggest that you use the recommend values in the data sheet.  If not, then you will need to test your application very carefully

    to unsure that it functions correctly under all conditions of use.

    Thanks

  • 0 in reply to Frank De Stasi
    Intellectual 440 points

    Yes, I fully agree on what you say about large pulse currents, inductance and the like.

    I also understand all of these things.

    But, what I do not understand well is why neither the EVAL BOARD nor The WEBENCH Simulator (suggests just 2 of 4,7uF) follows this design recommendations.

    In addition, if you check load and input transient simulations, everything seems to be ok.

    I also designed previously a 22V-40Vinput to 12Voutput 3,5A regulator and followed simulator input capacitor suggestion (again the same input capacitance, 2x4,7uF in parallel). The driver test result was ok.

    So, although I always try to follow datasheet recommendations as a good designer, take into account that from the sight of a BOM cost, PCB shape and the like this impacts directly on the final decision to make.

    For instance, given a derating for a certain package size, it is not the same to add 7 input capacitors in parallel than to add just 2 when the final result seems to be the same.

    So, How we should manage simulation results? Why this mismatching criteria? Can we be completely confident about them or just to forget the input voltage capacitors suggested and follow datasheet recommendations?

     

    Regards,

  • 0 in reply to Aaron_Rangel
    TI__Guru 70845 points

    Hello

    In the data sheet the recommendation, for the specific application, of 2x4.7uF is meant to suffice for the minimum of 10uF.

    Thanks

  • 0 in reply to Frank De Stasi
    Intellectual 440 points

    Hello, 

    I'm sorry but I think that there are a lot of open points still pending to clarify here and this reply it's not clarifying them.

    Think about I am designing a new PCB and costs and factor form impacts directly on this.

    Regards,

  • 0 in reply to Aaron_Rangel
    TI__Guru 70845 points

    Hello

    I have attached an application note that may be helpful.

    Thanks

    slyt670.pdf

  • 0 in reply to Frank De Stasi
    Intellectual 440 points

    Hello, 

    This application note is very good and details it all very well. Good design guide line. 

    Anyway, it would be nice that a reference to this app note appeared in the datasheet pages related to the input capacitance so that all was aligned. 

    On the other hand, simulations does not include Cbulk capacitance to meet load transient requirements as this paper explains. So I guess that in my case are not necessary. 

    Regards,