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TLV62569: How to reduce the voltage drop in a dynamic load as efficiently as possible?

Part Number: TLV62569

Dear Team,
Hi, I would like to inquire about the buck converter.
The circuit is composed as follows, and the ripple of the output voltage is as follows.

At this time,I try to keep the output voltage ripple within 36mV which is 2% of 1.8V.

In order to reduce the voltage ripple, the inductance of the switching part was reduced and the bulk cap was enlarged.
Also, I tried to reduce the ripple by increasing the crossover frequency by increasing the feedback cap to speed up the reaction speed of duty change, but to no avail.

One). May I ask if there is another way to reduce the dip voltage as shown in the picture?

  • Hello Si Yoon,

    Thanks for posting your queries.

    First, I wanted to clarify your primary concern. Is it the ripple or transient (dynamic load)? And can you kindly share the test conditions (see details below)? 

    - Minimum Iout

    - Maximum Iout

    - load current slew rate (for dynamic load)

    To ensure that the TLV62569 is stable, the maximum Cout should be 2 x 22uF (see table below), which is you are already exceeding in your application. A possible option to achieve a low ripple voltage, either dynamic load or steady-state condition, is to use TLV62569A (Forced PWM) instead. However, expect lower efficiency at light load conditions. 

    Best regards,


  • Hello Si Yoon,

    Just a soft reminder. Is the issue resolved?

    Thank you.

    Best regards,