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TLV1117LV: Input/Output capacitor and Startup characteristics

Part Number: TLV1117LV
Other Parts Discussed in Thread: TLV1117,

Let me ask you two questions when using the TLV1117LV33DCYR.

The first question is about the input capacitor 10uF and the output capacitor 100uF in Figure 9 of the data sheet. Considering the DC bias characteristics of the capacitors, the capacitance of the input capacitor 10uF is about 2.7uF, and the capacitance of the output capacitor 100uF is 24uF. In this case, connect four 10uF capacitors in parallel to the input section and four 100uF capacitors in parallel to the output section. Is it better to maintain 10uF in the input section and 100uF in the output section? Or is it better to connect only one 10uF capacitor to the input section and one 100uF capacitor to the output section, including the capacitance reduction due to the DC bias characteristics of the capacitor?

The second question is about startup characteristics. The datasheet does not list the startup characteristics. Could you give us some information about the characteristics of how many seconds the VO is output to the input VI?

  • Hi Akihiro, 

    Would you please post a screenshot of the figure you are looking at?

    Figure 9 in the datasheet is using a 1uF capacitor on the output. 

    For questions on the output capacitor selection, it may be beneficial to reference Input and Output Capacitor Requirements. 

    In Section it specifies that:

    Effective output capacitance that takes bias, temperature, and aging effects into consideration must be greater than 0.5 μF to ensure stability of the device - for the output capacitor. 

    An input capacitor is not required for stability, it is good analog design practice to connect a 0.1-μF to 1.0-μF, low-ESR capacitor across the IN pin and GND pin of the regulator. If source impedance is greater than 2 Ω, a 0.1-μF, the input capacitor may also be necessary to ensure stability.

    As for the Startup characteristics, it is defined in the datasheet as 100us



  • I'm sorry, I was looking at the "TLV1117" datasheet instead of the "TLV1117LV".
    I was able to confirm that the content of the question was described in the "TLV1117LV" data sheet.

    Let me ask you an additional question.
    For the "6.5 Electrical Characteristics" listed in the "TLV1117LV" data sheet, the Line regulation condition is "IOUT = 10 mA".
    What is the maximum value of Line regulation when "IOUT = 150 mA"?

  • Hi Akihiro, 

    From Figure 1 and 2, it seems the line regulation is consistent up until the differential between Input and Output exceeds 2.6V at higher temperatures. 

    I believe the line regulation for 150mA will behave similar to that of the 10mA load.