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# LM5176-Q1: High Ripple with 6V peak to peak voltage

Part Number: LM5176-Q1

Hi,

With a sinus input between 10v and 16v, we have a high output ripple on our 12V stable output (we received this ripple in a simulation and in an actual measurement) .

We don't understand if this is a DC to DC issue or a design issue.

The 12v stable output is in red.

I attached the relevant part from our design. We would appreciate your assistance with this issue.

Thanks!

Anna

• Hello Anna,

The input signal is a 1kHz signal, is this correct? Please tell me the min and max VIN you have in general in your system (not just for this test) and then the quickstart calculator can help to see how high the loop gain is at the frequency you are testing: https://www.ti.com/lit/zip/snvc208

Best regards,
Brigitte

• Yes you are correct, it's a 1khz signal. Generally, we want the device to be able to work with a 6v input minimum and 27v input maximum. our nominal voltage is 12V.

Thanks,

Anna

• Hello Anna,

Did you check with the quickstart calculator?

How long is the 21A peak current on the output? BTW, with 14A continuous current, it is possible that the transistors are running out of their save operating area, please check the power dissipation on the transistors.

Best regards,
Brigitte

• Hi Briggite,

I checked with the calculator you've shared and the loop gain is approximately 80 db in 1khz:

Is this the closed loop gain? Can you reply with the exact equation for the relation between the loop gain, vin and vout?

We increased Cslope from 220p to 560p and got a slight improvement in the output ripple, but it's still higher that 300mV. Can you suggest other changes that can improve it?

Thanks,

Anna

• Hallo Anna,

Yes, this is the closed loop gain.

At 1kHz you have a loop gain of 10dB. 80dB is at 1 Hz. So I think seeing a change in the output voltage of roughly 1.x V when entering a sinewave of 6V is following the expectations of the closed loop gain.

For reducing the output ripple, you can either increase the input capacitance (then the input cap will take some of the ripple away) or you need to increase the crossover frequency, but be careful, you need to stay away from the righ-half plane zero in boost mode. Otherwise the converter gets instable.

What is the reason that you experience such a high input ripple? I have never observed such a high sine wave on a converter input as the sources are mostly more stable or just have a single event, but not a sine wave.

Best regards,
Brigitte

• Hi Bridgette,

We are following the VWxxxxxx document series by Volkswagen spec. Our system is automotive and the motor can cause this kind of input.

I will try your suggestions and simulate it, how do I increase the crossover frequency? how does in effect the efficiency?

Thank you very much for your support,

Anna

• Hello Anna,

As mentioned, you can reduce the ripple at the input by increasing the input capacitance which will already take away some of the ripple. In addition you might think about an input filter.

Then you can use the quickstart calculator for checking out the crossover frequency. As this device has a boost converter behavior, there is the RHPZ which you cannot ignore, so you first need to increase the RHPZ by reducing inductance and output capacitance, but this will increase the output ripple, so you need to increase the switching frequency.

Best regards,
Brigitte

• Hello Brigitte,

Are you sure the graph of the calculator represents the closed loop gain? It's a bit strange because there is a phase margin value on the graph itself, which refers to an open loop in general.

Thanks,

Anna

• Hello Anna,

I am sure it represents the closed loop phase margin.

Best regards,
Brigitte

• Hello Brigitte,

First of all, thank you very much for your support. We were able to increase sufficiently our crossover frequency with the help of the calculator you provided and simulate it. The attempt resulted in a much smaller output ripple with a 10V-16V sine input. You really helped us a lot.

we decreased the capacitors values and increased the resistor of the compensation network:

We are not sure how this change affects the system besides providing us a better ripple. Are there any disadvantages to this change?

Best regards,

Anna

• Hello Anna,

Thank you very much for your kind words.

This depends if you did as well change the power stage (inductor and output capacitors) or not. Normally the phase margin is an indicator for stability. Which phase margin did the calculator show?

In general a higher crossover frequency results in a faster load transient response (faster reaction on a change of the output voltage) and sometimes lower phase margin.

Best regards,
Brigitte

• Hi Briggite,

We didn't change the power stage and the calculated phase margin is 67.

From the app note you provided, I understand that overall, this is not a problematic value. Please correct me if I'm wrong.

We will perform a load transient to verify.

Thanks,

Anna

• Hello Anna,

67 degree phase margin is a good value. The transient response might be somewhat slow, but if this is ok for your system better too much then too little phase margin.

Best regards,
Brigitte

• Hello Brigitte,

Thank you for the clarification. We can close the issue for now, we will use your kind assistance again if the actual results won't match the simulation.

Best regards,

Anna