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LM53625-Q1: SYNC input- conflicting DS entries

Part Number: LM53625-Q1

Hi,

There is an apparent contradiction in the DS. Can you clarify which of these is correct?

8.3.6: The device remains in FPWM mode and operates in CCM for light loads when synchronization input is provided.

8.4.1: The SYNC input is ignored during PFM operation.

Thanks,

Mark

  • Hi Mark,

    There is no contradiction here, both statements are correct.

    FPWM stands for Forced Pulse Width Modulation meaning the part will regulate the output by switching at a fixed frequency and varying the duty cycle or pulse width.

    PFM stands for Pulse Frequency Modulation where the part regulates the output by switching at a constant on-time and varying the frequency. 

    Regards,

    Harrison Overturf

  • Hi,

    The contradiction is that if the sync signal causes the device to stay in FPWM mode down to light load, the device will never enter into PFM mode. If the device enters into PFM mode and the sync signal is ignored, then it is not staying in FPWM mode down to light load. These two descriptions are contradictory.

    - Mark

  • I've verified that the DS 8.4.1 third paragraph last sentence is incorrect and should be removed. As stated in 8.3.6: "The device remains in FPWM mode and operates in CCM for light loads when synchronization input is provided." Therefore, when a SYNC clock is applied, the device never enters into PFM mode and stays in FPWM mode down to very light load. Also note that per 8.4.3, when VIN falls and the device is operating in dropout mode the sync signal is ignored.