TPS51100: recomendation

Connie Lu1

Intellectual 2080 points

Part Number: TPS51100
Other Parts Discussed in Thread: TPS51206

Hi team,

My customer is looking for something capable of sourcing & sinking up to 50mA, but Vout must support 0-1V.

TPS51200. it has a dedicated Vrefin pin, clearly limited to 0.5-1.8V
TPS51100: the key difference is it generates its own reference by dividing VDDQSNS (–0.1 to 3.6V in the datasheet), but something tells me VDDQSNS = 0.1V won't quite work. Could you please confirm what's the actual usable low limit for VDDQSNS, if not tied to VLDOIN?
TPS51206: fairly similar to the above, just smaller & 2A. Same question (VDDQSNS low limit, if not tied to VLDOIN)

Any guidance on what would work would be helpful!

Thanks,

Connie

over 3 years ago

0 Kadeem Samuel over 3 years ago

TI__Genius 16010 points

Connie,

The TPS51206 has a lower output voltage limit of 0.5V. I will check with the team about the lower limit of the TPS51100, and let you know as soon as I hear a response.

0 Kadeem Samuel over 3 years ago

TI__Genius 16010 points

Connie,

To clarify, what is the minimum output voltage that you are looking for?

I believe that we have an EVM that I can use to find the output voltage lower limit. We have already confirmed that the regulator can output 0.4V.

0 Kadeem Samuel over 3 years ago

TI__Genius 16010 points

Connie,

Below is measured data for the TPS51100 with output voltages from 50mV to 500mV.

/cfs-file/__key/communityserver-discussions-components-files/196/TPS51100-Low-Voltage-Data.xlsx

0 Connie Lu1 over 3 years ago in reply to Kadeem Samuel

TI__Intellectual 2080 points

Hi Kadeem,

This is for a image sensor. During pixel reset, each has a capacitor from ~3.3V to this rail (LDO needs to sink current), and adjusting the voltage via SW helps control the response in HDR mode. The 50mA current is due to the high frame rate they're targeting and would require 0V – 1Vout.

Do you have any recommendation for that VOUT?

Thanks,

Connie

0 Kadeem Samuel over 3 years ago in reply to Connie Lu1

TI__Genius 16010 points

Connie,

Do you happen to have a schematic that I can take a look at to help visualize this?

Is the setup that the customer is looking to connect the capacitors between 3.3V and the LDO VTT, or something different? Are you looking for a recommendation on what value between 0V and 1V would be ideal for this setup?

0 Connie Lu1 over 3 years ago in reply to Kadeem Samuel

TI__Intellectual 2080 points

Hi Kadeem,

Customer is looking for a device that can support 0V-1Vout that can source and sink 50mA.

Thanks,

Connie

0 Kadeem Samuel over 3 years ago in reply to Connie Lu1

TI__Genius 16010 points

Connie,

The TPS51100 should be able to support this.

0 Connie Lu1 over 3 years ago in reply to Kadeem Samuel

TI__Intellectual 2080 points

Hi Kadeem,

Is there any concerns using this part for their application that we should look out for?

Thanks,

Connie

0 Kadeem Samuel over 3 years ago in reply to Connie Lu1

TI__Genius 16010 points

Connie,

Not that I can think of. Unfortunately, I am not particularly familiar with that specific application. However, the TPS51100 is able to both sink and source current, has a fast transient response, and can handle low output voltage at the required current.

0 Connie Lu1 over 3 years ago in reply to Kadeem Samuel

TI__Intellectual 2080 points

Hi Kadeem,

Just checked with the customer -

The capacitors between 3.3V and the LDO output are internal to the CMOS imager, they only mentioned them to explain why it's important that the LDO can sink and source current (like VTT terminators). The CMOS imager outputs ~2A/1uS pulses at ~20KHz (40mA avg), and they have ~20-100uF bypass capacitance to GND.

LDO output drives the CMOS image sensor pin with ~20uF bypass to GND. They might add a series ferrite bead and extra capacitance as needed.

Another option is to generate a -0.5V supply (LM27761DSGR?) and use it for the TPS51100 GND. What do you think?

0 Kadeem Samuel over 3 years ago in reply to Connie Lu1

TI__Genius 16010 points

I would definitely recommend in the layout placing the TPS51100 as close to the CMOS as possible with a short and wide trace.

Technically, while not recommended, the PGND pin is rated down to -0.3V for the absolute maximum rating - if the PGND pin is connected to a voltage source less than 0V but not less than -0.3V, you should be able to generate output voltages incredibly close to 0V.

Keep in mind that, with a small (<100mV) output voltage and a low (<10mA) output current, the %error in the output voltage will be relatively large, per the measured data. If they intend on using extra capacitance on the output, do keep in mind that this will increase the soft start time, as well as slow down the transient response. If these are not problems, then using the TPS51100 should suffice for this application.

Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

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TPS51100: recomendation