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TPS60400: Tripling Inverter

Part Number: TPS60400

Hi support team,

Can TPS6040x be used as tripling inverter?

Is the schematic with the following connection of the third device correct?

Second "OUT" -> Third "GND"
Second "GND" -> Third "IN"

I am worried that there is the following sentence at the end of page-17 of SLVS324C.

"When cascading more than two devices, the output resistance rises dramatically."

Regards,
Dice-K

  • Hi Dice,

    According to the schematic given in the datasheet for multiplying the output voltage, the connection for the third device is also correct. I shall verify this and come back to you by end of this week.

    Figure 7.7 in the datasheet (SLVS324C), shows the output resistance of the device for different input voltages. For a non-cascaded system,  Section 8.3.1 shows you how to calculate the amount of output voltage drop you get for a given load current and output resistance. When you have 'cascaded devices, every device will also have to supply the quiescent currents of the following devices. The drop in output voltage you can expect for 3 cascaded devices is Δ VO = 3 × RO × (IO + IQ )

    For just 3 devices in the cascade, the amount of drop in VO you can expect depends mostly on the output load current you have, as this is much greater than the quiescent current IQ. The IQ term becomes dominant only when you have much more devices in the cascade.

    The quiescent current of TPS60400 is around 125 uA at 25C and VIN of 5V .

    Best regards,

    Varun

  • Hi Dice,

    I verified your circuit and it is correct. How much output current does your application need? Do you have any further questions?

    Best regards,

    Varun

  • Hi Varun,
    Thank you for your support.

    I would like to calculate the voltage drop when 30mA is applied.

    About the following formula,
    Δ VO = 3 × RO × (IO + IQ )

    Looking at Figure 7-7, the smaller the VI, the larger the RO.
    Is this VI the voltage of (VI-GND)?
    Or is it the VI itself?
    For the VI itself, the RO for the second and subsequent stages will be very large.

    Best regards,
    Dice-K

  • Hi Dice,

    The input voltage VI in Figure 7-7 is the voltage between the IN and GND pins of a single device.

    Yes from Figure 7-7 there is a variation in RO itself with VI. Depending on the VI used (>3V or <2.5V), there can be a decrease / increase in the RO of the following stage.

    Best regards,

    Varun

  • Hi Dice,

    Do you have any further questions? I am closing this thread. You can reopen it by commenting here.

    Best regards,

    Varun