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TPS2373: Sone questions about the APD and VDD...

Part Number: TPS2373

Dear Sirs,

Please refer to attached for customer schematics.

TPS2373-4 ADP.docx

While customer testing Aux power input and found questions.

1. When APD input is higher than 1.65V, and VDD input from DC27V~DC41V, there is output from VC_out.

If APD input is below 1.65V or floating or 0V, the VDD needs higher than 41VDC then the VC_out starts to output voltage.

Is that normal or not?

2. What is the relation between the APD and VDD since there is no detailed information in datahseet. 

As function block, there is no any direct trace for control between them.

  

Thanks.

  • Hello Peter,

    1. Yes this is expected behavior: 

    Normal PoE range is 42V-57V. 

    2. APD is the adapter power detection pin. This pin is intended to be used when adapter is present, to tell system adapter is used and to do a number of functions shown above. 

    VDD is the positive input power rail.

    They are independent of one another. 

    If this post answers your question, please indicate so by marking this thread as resolved. Thank you.

     

    Regards, 

     

    Michael P.

    Applications Engineer

    Texas Instruments 

  • Hi Michael,

    As customer test and found, if the VDD is 40V~75V(from PoE),vc_out will output normally.

    Once the VDD is below 40V, TPS2373 will try to check APD voltage to see if there is aux power source present or not.

    At this state, if the APD is more than 1.65V, the vc_out will output aux power voltage no matter what voltage is it!

    That's our understanding for TPS2373, please help to confirm it is correct or not?

    Thanks.

  • Hey Peter, 

    Yes this is correct behavior. 

    If this post answers your question, please indicate so by marking this thread as resolved. Thank you.

     

    Regards, 

     

    Michael P.

    Applications Engineer

    Texas Instruments