LM5175EVM: gate driver signal not consist

Hello Mona,

Do you mean the standard EVM without any modification?  Also, can you check if the Dithering function is enabled or not? 

Thanks,

Youhao Xi, Applications Engineering.

Hi, Youhao

only change CS resistor to 5mohom, and dithering function is enabled. 

Hello Mona,

Please ask the customer to disable the dithering function and check the signals again.

BTW, which EVM is used? In addition I expect that the SLOPE capacitor needs to be reduced when he is reducing the CS sense resistor. Otherwise noise injected in the CS pin has too much influence.

Best regards,
Brigitte

It's LM5175EVM, and when testing UVLO, the output no load, when the Vin=6V, Vout has 2V, which has not reach turn on 6V. Is this normal?

what reason would possible cause this Vout increase? have loop to charge the output capacitor? 

Hello Mona,

I am sorry, but I do not understand your question. Please detail exactly what you are referring to.

Best regards,
Brigitte

Hi, Brigitte

I see output has voltage(~3.2V) when Vin=5.8V, which has not reach turn on threshold. And this problem only occurs when test under no load. 

And during this test condition, EN=1.18V, Switches haven't turn on. 

I am thinking this is the leakage current on SW pin?

Hello Mona,

Can you please measure the startup into 5.8V with an oscilloscope? Please measure VIN, VOUT and the 2 switch nodes.

Best regards,
Brigitte

CS resistor change to 5mohom, what's the suitable Cslope? use the equations in datasheet, Cslope= 376pF, but after test, when Cslope=48pF, the buck-boost transition seems stable, what's the reason?

Hello Mona,

The current sense signal is noise sensitive, so the layout of the current sense path is extremely important, see this tech note: https://e2e.ti.com/blogs_/b/powerhouse/posts/four-switch-buck-boost-layout-tip-no-3-separating-differential-sense-lines-from-power-planes

If more noise is present on the CS signal, reducing the slope capacitor helps to stabilize the operation. Nevertheless, if still possible, optimizing the layout first would be preferred. Please refer to the datasheet for the operation of the slope signal.

Best regards,
Brigitte

Hi, Brigitte

Please check this, it only exist in no load condition, since if I connect 0.1A load, and this problem disappear.

Hello Mona,

Sorry, but what exactly do you see as a problem?

Best regards,
Brigitte

Hi, Brigitte

Please check this post, it maybe more clear tor this problem.

LM5175-Q1: output has voltage before start up - Power management - INTERNAL forum - Power management - INTERNAL - TI E2E support forums

Hello Mona,

Thanks for the details in the other thread. Please let's discuss in the other thread and close this one for now. We are digging into the detail at the moment but will need some more days to get back to you.

Best regards,
Brigitte