Hi,
My design (using the TPS92391) has a potential situation whereby during system shutdown, battery voltage (3-4.2V) may be present on the power input to the LED driver (so present at the VSENSE_N and VSENSE_P pins), but the VDD pin of the TPS92391 will have 0V (no power).
Is this state allowed, or is there a potential for the TPS92391 to become parasitically powered via the VSENSE_N and VSENSE_P pins, leading to erratic behaviour and increased current consumption, when my device should be 'OFF'? I intend to use a Power-Line P-FET in the circuit, which (with a 20k pull-up R) should be OFF when the TPS92391 has 0V on its VDD pin.
Thanks!
Robin