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BQ78350-R1: Safe_Pin enable

Florin Oltean
Prodigy 20 points
Part Number: BQ78350-R1

Hello ,

I have just tried couples of times to set this pin HIGH but until now i didn't succeeded.
I would require a 2nd opinion on this issue.

my configuration is for a 10s BMS
On this system i have tried the following setting to simulate an SOT over the SAFE pin :

Settings :

1.Enable_PF_A   - SOT -  10 hex
2.Enable_PF_B   - TS1 -  10 hex
3.PF -> SOT default 65°C with delay 5s
4.Manuf.Status Init -> 0170 hex  (Safe_en;PF_en_LF_en;Fet_en)
5.SBS com -> 0131 hex -> VSCL0 set 1 (as is mentioned in other topics VScale is needed)


Wanted result was that SAFE_Pin is set to HIGH (Vdd)

I did actually recorded a change in PF_status as following

1.  Safety _status _B >02 hex > OTD event
2.PF_Status_A_-> SOT event
3.Operation status _A  -> 017b hex event

Note: i have tried also to get the same by setting also the Fuse PF_safe_A and B -> recorded the event as for a blowing fuse in BMS software

Questions :

1.Is it possible that i forget something to configure ?
2.Does the Safe_pin needs an Pull-up restor to Vdd?

  • 0
    TI__Guru* 77283 points

    Hi Florin,

    When configured, the SAFE pin should drive high for the period defined by the Fuse Blow Timeout register when a permanent fail condition occurs. The specific permanent failures mapped to the SAFE pin are defined in the PF SAFE A and PF SAFE B registers. These are set to zero by default. Are you setting these registers?

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 20 points

    Hi Matt ,

    Thanks for your support . I have configured also the PF_Safe_A & B ,but i had forgot that Fuse Blow Timeout is by default is 30 s . Changing the value help .

    I still have another question :

    For further configuration , for example SOCC and SOV for the safe pin .

    Apart of SOCC and SOV values in Permanent_Failure should be set other register ?

  • 0 in reply to Florin Oltean
    TI__Guru* 77283 points

    Hi Florin,

    I am not sure I understand the question. Are you asking if other parameters need to be configured for the SOCC and SOV to be active? Or are you asking which parameters need to be set for configuring the behavior for these permanent failures?

    The behavior of these permanent failures is described in Section 4.5 and 4.6 of the TRM. There are threshold and delay parameters for each of these (SOCC Threshold, SOCC Delay, AFE SOV Threshold, and AFE SOV and SUV Delay).  The PF SAFE A maps these to the SAFE pin.

    Best regards,

    Matt