Due to the U.S. Thanksgiving holiday, please expect delayed responses during the week of 11/22.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCD3138A: Front End absolute value in averaging mode

Part Number: UCD3138A
Other Parts Discussed in Thread: PMP21529, UCD3138


can I use the value from   FeCtrlxRegs.EADCVALUE.bit.ABS_VALUE in averaging mode? it seems to be ok, but datasheet says that without SAR I should:

"It is also possible to get absolute value data from the EADC without using SAR mode. For accurate data in this case, the Error ADC has to be within range of the EADC DAC setting.
Vabs = Veadcdac + Veadc"

  • Tomasz, the UCD EADC has a limited range.  It only has 6 bits in the EADC.  Depending on the gain, each bit can be worth from 1 to 8 millivolts.  So the maximum dynamic range is 8*64, or 512 millivolts.  The EADC centerpoint is set by the EADCDAC.  In SAR mode, the SAR logic controls the EADCDAC and scans the voltage range.  If you are not in SAR mode, you are limited to the range around whatever EADCDAC value you have set, and the EADC gain value.  Within that range the average value is correct, but the voltage is out of that range, then the EADC will be saturated, and the value will be incorrect.  

  • yes, I know that, I control saturation bits. But when I look at content of FeCtrlxRegs.EADCVALUE.bit.ABS_VALUE in averaging mode when the loop is closed I see correct 10 bit value which in theory can be used as readout.

    In my application fe0 measures voltage, and fe1 current. I switch between frontends using mux to get current limiting. So far I was using ADC12 to detect over current condition (like in PMP21529) and the code works fine, but ADC12 has different reference and it doesn't really measure the same signal as diff frontend. So my thinking was, that I can use measured value directly from the frontend as signal that power supply should go to current limit mode. 

    Implementation is trivial: fe0 has dac setpoint = output voltage, fe1 has a dac setpoint = current limit. If fe1 has saturation due to too high current or current measured using fe1 > current limit + threshold -> switch to cc mode.

    Similar thing added to fe0 while in cc mode makes smooth transition between modes. Only drawback is the lower resolution in fe abs value

    But I have to be sure that the FeCtrlxRegs.EADCVALUE.bit.ABS_VALUE can be used for it in averaging mode

  • Tomasz, that's what it says in the UCD3138 Technical reference Manual, so presumably the average value is used to calculate the absolute value in averaging mode.  See the top of page 125.  Of course you need to verify that your setup does what you need it to in your actual application,.