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BQ79606A-Q1: Voltage protector when balancing

Part Number: BQ79606A-Q1

Hello,

I have 3 BMS designs with BQ79606 for LFP packs: 12S / 15S / 16S

These 3 BMS have the same problem: when balancing occurs, the voltage protector (3.8V) is triggered.

Without balancing, everything is fine (the comparators work)

The datasheet says that voltage protection is automatically disable when balance is active.

 

The register configuration:

WriteReg(0, OV_THRESH, 0x44, 1, FRMWRT_ALL_NR); //3,7V

WriteReg(0, COMP_DG, 0x0F, 1, FRMWRT_ALL_NR);   //set 500us comparators deglitch timer

WriteReg(0, OVUV_CTRL, 0x3F, 1, FRMWRT_SGL_NR); //enable all cell Over voltage/Under voltage

WriteReg(1, OVUV_CTRL, 0x3F, 1, FRMWRT_SGL_NR); //enable all cell Over voltage/Under voltage

WriteReg(2, OVUV_CTRL, 0x07, 1, FRMWRT_SGL_NR); //enable all cell Over voltage/Under voltage

WriteReg(0, CONTROL2, 0x14, 1, FRMWRT_ALL_NR); //TSREF enable, Enables the OV/UV comparators

WriteReg(0, CONTROL2, 0x17, 1, FRMWRT_ALL_NR); //CELL_ADC_GO = 1, TSREF enable, AUX_ADC_GO, OVUV_EN

WriteReg(0, CB_CONFIG, 0xAA, 1, FRMWRT_ALL_NR); // duty cycle of 10s, continue to balancing (no of thermal shutdown), Odds then even cells

WriteReg(0, CB_DONE_THRESHOLD, 0x20, 1, FRMWRT_ALL_NR);//disable CD_DONE

 

To activate balancing, the software writes:

WriteReg(0, CB_CELL2_CTRL, 0x8A, 1, FRMWRT_SGL_NR);          //10s cycle for cell balancing

WriteReg(0, CONTROL2, 0x36, 1, FRMWRT_ALL_NR);    //BAL_GO = 1, TSREF, AUX_ADC_GO, OTUT_EN = 1, OVUV_EN

 

When balancing occurs at cell 2, the voltage across CB1 – CB0 increases (4.5V) and I can see :

  • with debugging (CAN bus) that the OV_FAULT register is set
  • the fault pin is cleared

Why is the comparator triggered? Should firmware disable comparator before enabling balancing?

  • Hi Nicolas,

    I will try to help you resolve your issue.

    I think that the comparator might be triggered before you even run the balancing. Can you please check if the OV_FAULT is set before you run balancing (just before you write BAL_GO = 1). If yes then please clear the fault and run the balancing.

    Let me know if that works.

    Thanks,

    Viktor.

  • Hi,

    I tested this sequence:

     - Set CB_CELL2_CTRL to 10s (0x8A)

     - Clear OV faults with OV_FLT_RST = 0x3F

     - Read OV_FAULT  : ok, all OV_FAULT are cleared

    At this time, fault pin = 1 (ok)

     - Write BAL_GO with CONTROL2 = 0x36

     - Read OV_FAULT : ok, all OV_FAULT are cleared

     - Wait 20ms

     - Read OV_FAULT  : one OV_FAULT register is set, and to fault pin is cleared

    Do you have an idea ?

  • Hi Nicolas,

    It seems like the OVUV function will not operate during cell balancing.

    I just checked with the team and it seems like there is a note in the Datasheet stating this on page 41, Chapter 8.3.6.1 " Cell Voltage Window Comparators" right under figure 20.

    Regards,

    Viktor.

  • You are right, the datasheet says that the OVUV function will not operate during cell balancing. So why OVUV function is triggered during cell balancing, in my case ? It should be automatically paused.