UCC21750-Q1: Regarding UCC21750 clamp pin connection and Desat connection details

Dear Dimitri james,

Good morning.

Thank you very much for your reply.

dimitri james said:

Can we connect UCC21750 clamp pin with Com/source of sic Mosfet as in ISO5852S in TIDA-01606?

It should not be connected to COM/SOURCE/GND2 unless you are using a unipolar supply. If using bipolar, it can be connected to VEE2, but keep in mind, this actually disables the feature. 

Since you are driving SiC I suggest you to connect it directly to the gate!

Ok we will fallow above in all our design and simulation.

dimitri james said:

2)Can we fallow same Desat connection (consisting of 100pf capacitor,12V zener diode,1K resistance,3V zener diode in series with reverse voltage blocking diode)of IS05852S of TIDA-01606 in UCC21750 Desat connection?

You can. Just make sure the blocking diode exceeds your DC bus voltage first off, and you can also do some paper calulcaiton / simulation to verify detection time. 

We are still working in simulation on this DESAT connection type taken by referring TIDA-01606 design.

We will get back to you.

Thank you very much for your reply.

Girish K

Dear Dimitri James,

Good afternoon.

We have sent you simulation files in private message.

Kindly check.

Thank you very much.

Girish K

Hi, Girish,

Thanks for the heads-up. We will check them and get back to you by Tuesday.

Best regards,

Don

Girish, 

I only received one set of files, presumably 2 pspice. 

Please check the other thread you have opened. If the same files apply for both, please let me know, then i can close one of these threads for clarity. 

Best

Dimitri

Dear DON Dapkus,

Good morning.

Kindly check those simulation files and gives us some insights on what we are doing wrong.

Your team inputs are very valuable for us and we will be waiting for your response.

For your information,there are 3 zip files of simulation,

1.IS5852S based driver simulation will work upto 550 input and simulation time it takes is around 5 hours to complete 20ms of simulation.

2.UCC21750 (unencrypted model based) and UCC21750 (encrypted model based) simulation is working only for 100V input(not working for rated voltage of 600V) and takes simulation time of 8 to hours approximately.

Kindly check.

Thank you very much.

Girish K

Dear Dimitri James,

Good morning.

dimitri james said:

I only received one set of files, presumably 2 pspice. 

I will check and once again send to you.

Thank you

Girish K

Thanks, Girish!

Best regards,

Don

Dear Don,

Good morning.

We are waiting for your reply.

Have a good day.

Thank you

Girish K

Hello, I am working on this and will respond by tommorow PM. 

Best

Dimitri

Dear Dimitri James,

Good morning.

Thank you for your response.

Have a good day.

Thank you,

Girish K

Hi Dimitri,

Good morning.

Thank you very much  for your response.

dimitri james said:

I have got the simulation to run successfully using following options

* calculate initial bias point

* ITL4 to 10

 Above solution is a good improvement in ISO5852S for simulating upto rated voltage of 600V.

But we require solution for UCC21750.We simulated ISO5852S because almost UCC21750 and ISO5852S are similar in so many aspects.So for reference only we simulated ISO5852S driver.

So our original question was why we couldn't able to simulate UCC21750 based circuit.

Kindly check UCC21750 driver based simulation which we have sent you.

Thank you,

Girish K

Girish, 

I changed the drivers in your ISO5852S test bench to UCC21750 and ran it. 

Can you try this and the steps I mentioned and confirm whether this continues not to work?

Best

Dimitri

Dear James,

Good morning.

I have tried the suggestions you said and ran simulation.

Still the simulation is not converging.

I have sent you updated file,kindly check.

Kindly check bais point analysis snap shot and transient analysis snap shot.

Thank you,

Girish K

Dear James,

Good evening.

I have sent you updated simulation file.

Kindly check.

Waiting for your response.

Thank you very much.

Girish K

Girish, 

Thanks!

Allow me to check later today, I will get back to you. 

Best

DImitri

Dear James,

Good morning.

Thank you for your response.

When you check the bais point analysis and transient analysis,kindly take screen shot and send to us.

Kindly check output(Inverter output AC voltage ) and if there is no problem with UCC21750 model ,schematic and settings then let me check with pspice software regarding reinstalling it.

We couldn't able to know the root cause of the issue,so please check.

Thank you very much for reply.

Have a nice day.

Girish K

Girish,

I am working on this and will give an update later tonight

Best

Dimitri 

Girish,

Sorry for what seems to be a late reply, but I have been struggling to resolve the issue you are seeing when using the UCC21750 model. 

I have done quite a bit of simulation and a lot of effort trying to get your schematic to converge. 

After a while of this, I decided to rebuild a "simpler" schematic directly from our known-working EVM test bench which is on TI.com so I could exclude anything in your testbench as causing the issue.

It seems that when the UCC21750 model is on the lowside, with 0 node on COM pin, there is no issue, and the simulation converges every time. 

As soon as Iput UCC21750 on the highside, the entire simulation cannot converge at anything >100V vbus. Actually, even at <=100Vbus, the result we get from UCC21750 on the highside is completely wrong. The model sinks 100s-kA of current, and generates GV on some internal node in the model. This is the reason why the halfbridge config is just not working when you replaced with UCC21750. 

Secondly, if we check "Skip initial Bias point" option, this completely breaks model in both HS and LS position, and neither will have no output, regardless of whether we try to toggle its RST pin. I initially tried this since there the simulation with UCC21750 wasn't even converging at t=1e-12~. 

I simulated the same with ISO5852S model which does show neither issue, which is why your simulation is working well with ISO5x5x model. 

Actually, If we have UCC21750 on LOWSIDE and ISO5852S model on HIGHSIDE, the simulation will run flawlessly.

As soon as we put UCC21750 on the highside, regardless of what model we have for lowside driver, the simulation breaks in a spectacular fashion.

Long story short: UCC21750 model is not behaving correctly when used on high-side but is working well for low-side. Simulation will not possibly converge if using a halfbridge with this model, unless we skipped the bias point calculation, but then it converges only because the driver has no output 

Please allow me to discuss this sim issue with my colleague who previously supported this product family tomorrow. 

If the case is we need to revise the model, it may take some time and I can't provide a definite time when this would be completed. 

If your use of UCC21750 model is time sensitive, I suggest a workaround by referencing both highside and low-side driver's COM pin to node 0 and using VCVS with gain of 1 on only the high-side's secondary-side pins and referencing that VCVS to the high-side source to "isolate them." 

Otherwise I would suggest to stick with the ISO5852S model if possible 

I will give an update on this tommorrow. 

Best

Dimitri

Girish, after discussing with my colleagues, we confirm that the model is having issues when "floating"  / used in high side configuration. 

While I will help prioritize this fix, I cannot guarantee an ETA on when the fixed model would be available. 

In the meantime, I can only suggest some workaround solution. 

1) Just simulate everything with ISO5852s for the time being (with or without a booster stage to achieve the higher drive power like in UCC21750)

2) Simulate with UCC21750 on the lowside, and ISO5852S on the highside (with or without booster)

3) I thought there could be a workaround by isolating the Gate-source connection with a VCVS so that the driver could remain tied to Node0. My idea is below, but I haven't had the time to simulate it so can't guarantee the results. This concept cannot be used with DESAT and performance will differ. 

I will close this thread for now, and when we get the PSPICE model of UCC21750 fixed I will give an update. 

Best

Dimitri

Dear James,

Good morning.

Thank you very much for your reply.

In hardware side,we have done testing without DESAT connection (UCC21750)and its working fine.

So we tried to simulate the circuit to solve DESAT connection issues and to capture circuit output details and transient details to improve in hardware side.

dimitri james said:

If your use of UCC21750 model is time sensitive, I suggest a workaround by referencing both highside and low-side driver's COM pin to node 0 and using VCVS with gain of 1 on only the high-side's secondary-side pins and referencing that VCVS to the high-side source to "isolate them."

dimitri james said:

I thought there could be a workaround by isolating the Gate-source connection with a VCVS so that the driver could remain tied to Node0. My idea is below, but I haven't had the time to simulate it so can't guarantee the results. This concept cannot be used with DESAT and performance will differ. 

We can work around with VCVS but our main objective of integrating DESAT will not be achieved through above concept as you said.

As you said there is an issue with UCC21750 simulation model,is this behavior related to actual driver IC?

Is there any reference projects of UCC21750 used with DESAT protection?

UCC21750 has fast desat protection of 200ns and where as ISO5852S has 2us,which seams slower.So is there any special precaution to be taken while designing DESAT protection for UCC21750 in Hardware level or there any related reference projects?

Kindly suggest your suggestions and observations of UCC21750DWR IC.

Thank you for your response.

Have a nice day.

Girish K

Caliber

Dear James,

Good morning.

Thank you very much for your reply and suggestions.

Girish K

Caliber

Dear Dimitri James,

Good morning.

Sure i will post if i had any doubts and thank you and  your team  for quick responses.

You can close this thread.

Thank you,

Girish K

Caliber