BQ25886: Will not charge battery with protection circuit when over-discharge circuit is tripped

Hi Steve,

Can you try startup with with charge disabled and then enable charge?  With the protection circuit open, the charger thinks there is no battery so it is, at minimum, toggling between charging and termination using the BAT capacitance as the "battery".  

If you see 7 power up attempts then HiZ mode, the issue is with the input.  This device is very sensitive to input line impedance.  If, at start up, the abrupt end of the startup inrush current causes ringing at VBUS that trips the VBUS_OVP 7 times, the charger shuts down.  Since your PS is already very close to VBUS_OVP, this is problem is likely.  Increasing VBUS and PMID capacitance by 22uF or greater generally helps.

Regards,

Jeff  

Hi Jeff,

I have been trying to do as you say with not enabling the charger right away.  That takes a few more modifications since the MCU is running off of the V_SYS right now.  I have never seen it make 7 attempts to do anything so far.  The VBUS power is up and stable for about 600ms.  The REGN comes up.  The V_SYS comes up to about 6V.  The VBAT does not visibly move.  The V_SYS ramps back down again.   There is no obvious motion on VBUS, and there are no re-tries.  the capacitance is light, so I will give that a quick try.  I checked the TS pin, and it is not the issues.   After what appears to be a single attempt, no further activity occurs until the power is cycled.  I will continue to try to hold off the charge enable.  I will update you when I have the results.

This is a shot of the REGN and V_SYS signals. 

Regards,

Steve

Hi Steve,

If you only disable charge using the /CE pin or CE bit, SYS will still come up.

Regards,

Jeff

Hi Jeff,

I understand.  The problem is that the 3.3V regulator the runs the MCU is powered by V_SYS.  I need to diode OR the input supply into the regulator to generate the 3.3V to power the MCU and pull up the CE pin.  I then need new firmware to force it high before driving it low.  Not impossible, just a few moving parts.  I hope to have an answer in a couple of hours.

Regards,

Steve

Hi Jeff,

I delayed the charger enable as you suggested.  The V_SYS now comes up to 6.2V or so and stays there until I attempt to enable the charger.  When I enable the charger, the V_SYS immediately shuts off.  I never see any voltage on the VBAT pin, so it never attempts to turn on.  The first plot below shows the V_SYS behavior.  The second plot shows the same behavior when the VBUS is lowered below 6.1V.  In this situation the charger enables normally.  The plots show VBUS and V_SYS.  I do not have VBAT on the plots.  In the first one it remains 0V, and in the second it rises to about 7V at the point where V_SYS shut off on the first plot.  You can see the glitch in VBUS on the second plot when the battery is enabled.  A 22uF input capacitor is present on both plots.

The specification mentions something about a voltage comparison between the VBUS and the V_SYS.  If the two are within 250mV of each other it sets a short circuit flag.  The implication is that it assumes there is a short if VSYS = VBUS whether there is one or not.  The spec states that the charger will shut off VSYS and attempt to recover.  My theory is that it is assuming there is a short and turning off V_SYS and trying to power up on the battery which is not connected because of the protection circuit, but I have no way to prove that.  If that is the case, I don't know how to resolve this.  There is no detail on what the recovery from a perceived short is.

The charger always works correctly with a VBUS below 6.0V.  Above that some units work and some don't up to 6.15V.  Above 6.15V everything fails.  The V_SYS with no battery is listed as 6.2V typ, so I expect there is some slop in that which would further explain the variation we see.  Unfortunately, the spec says that the shut off is 6.2V minimum, which it clearly isn't in this case.

Any additional insight you could provide would be appreciated.

Regards,

Steve

HI Steve,

I am almost certain the problem is due to VBUS_OVP.  I took a BQ25883EVM, where BQ25883 is the I2C version of BQ25886, and used long leads from a 6V power supply to EVM and get the attached waveforms:

As you can see on the zoom plot, the ringing on VBUS due to high IBUS inrush current, takes VBUS above VBUS_OVP.  The fault flag is reporting VBUS_OVP as shown below:

If I add 22uF on PMID, I get normal startup and minimum ringing.

So, if you can zoom in on VBUS, you might see this ringing and if so, that is your issue.  You might be able to fix by simply increasing the voltage rating of your ceramic input capacitors to account for capacitive derating with applied voltage.  

Regards,

Jeff

Jeff,

I will take a closer look.  We are already using a 25V 0805 22uF capacitor and it made no difference.  The plots my technician got are at 2V / div, so they aren't good enough.  The scope I am using doesn't have enough DC offset to zoom in as much as you have.  I AC coupled the scope, but the input is saturated still from the power coming up.  Tomorrow I will check it with the the delayed start-up version that we built today.  I know a lot of the ringing is the result of the ground lead length on the scope, so it is difficult to get a really good sense of how much of the ringing is real. I know that the fault occurs when the VBAT is ready to be switched on.  The VBAT voltage doesn't move significantly if even at all before the fault occurs so the battery PCM is still enabled blocking the battery from the VBUS pin.  The only thing the charger sees is the 10uF capacitor load capacitor.

I don't know if I mentioned this or not, but once the PCM is closed and the battery is connected I can turn the system on and off at will with the input up to 6.20V and it works every time.  It only does this when the PCM on the battery is open.  With the battery engaged I would think there would be less in-rush on the 10uF capacitor as it should already be charged up, so I agree that in-rush is a likely factor.

How does the part recover from an OVP?  The spec says it should clear itself, but doesn't say how.  Does it revert to powering up on the battery?  I have been discounting the OVP as the primary cause due to lack of re-tries.

Regards,

Steve

Hi Steve,

The device should recover from VBUS_OVP. I didn't show it above but my EVM repeated indefinitely, with SYS going up and down.  I am researching the exact timing for the retries as it appears your device is going into HiZ mode and that only happens on certain faults with certain timing that repeat 7 times.  If you add more capacitance at PMID, does the issue go away?

Regards,

Jeff

Hi Jeff,

I will try that.  The initial design is per the datasheet design example with 1uF on VBUS and 44uF on PMID with a 1uF inductor.  I hope to have scope shots of the ripple on VBUS shortly.  I can try increasing one of the 22uF PMID caps to 47uF to see if that does anything.  Changing the 1uF to a 22uF on VBUS had no effect.

Can you provide any insight on section 8.3.10.1.4 of the specification?  We are operating VBUS and VSYS within 250mV of each other in this case since VSYS defaults to 6.2V with no battery and the VBUS input is just shy of 6.2V.  Everything is fine until you try to enable VBAT.  If we lower VBUS, the problem goes away.  Would the over current flag put the system into Hi-Z mode?  Once the battery is enabled there is also no problem but at that time VSYS is much higher than 6.2V so that flag would not be a factor.  We found that if we lower VBUS to 6.1V the system comes up.  We can then put VBUS back to 6.17V and it continues to operate just fine.  We can cycle the power on and off at 6.17V and it comes up every time as long as the battery is connected.

I will provide an update when I have the scope shots.

Regards,

Steve

Hi Steve,

The charger only goes into HiZ after certain faults if the fault repeats for 7 times. Multiple VBUS_OVP faults do not cause the device to enter HiZ . The fault condition that you are referring to is explained below:

The device charges VSYS to VBUS minus a diode drop by soft-starting the gate of QBLK. If device fails to ramp up VSYS due to a short-circuit at SYS, the device will turn off QBLK, wait for 200 ms and then attempt to restart. After seven consecutive failures, the device will set EN_HIZ bit to '1' and go into HIZ mode.  

The only other forward/charge mode power-up fault that has the seven retries is poor source (VBUS too low) which is not your issue.  

Can you check your /PG pin?  How is it pulled up (SYS or REGN)? If pulled up to VBUS and it is reporting not power good, then the problem is VBUS_OVP.

Regards,
Jeff

Hi Jeff,

I agree that everything points to OVP.  Here is a plot of the VBUS during the fault.  As you can see, there is no noise visible even at 200mV/div.  

The VBUS voltage is low enough to allow VSYS to come up.  The voltage on VBUS does not change when VSYS comes up, yet VSYS faults when VBAT is enabled and does not attempt to start again until VBUS is cycled.  The PG pin indicates that power is not good and the REGN voltage returns to 0V with VSYS.  I cannot argue that it behaves like an OVP fault, but it isn't an OVP fault, and then it is with no change in input levels.  I can only guess that there is some internal current path that induces an offset in the OVP comparator.  Even so you would think that once everything returned to its starting state that it would repeat the process.

I will look at the PMID capacitance increase next.

Regards,

Steve