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UCC28780: Abnormal secondary synchronous rectifier current

Part Number: UCC28780

Hi expert:

       One of the current waveforms of my secondary synchronous rectifier has achieved ZCS, and the other has not. The two waveforms form a cycle. I don’t know why the secondary synchronous rectifier is turned on twice in Figure 2 and the ZCS is not realized. Figure 3 is the Simplis simulation waveform. The synchronous rectifier tube uses BSC098N10NS5, and the synchronous rectifier control chip uses MP6908A.

Figure 1

Figure 2

Figure 3

Thank you.

  • Hi, Li,

    My colleague who supports this device is out for the holiday. He will be back on Monday. Thanks for your patience.

    Best regards,

    Don

  • Figure 1 and Figure 2 show the Vgs and Isec waveforms of the synchronous rectifier tube. It can be seen that the Vgs is missing, but the synchronous rectifier tube is still turned on.

    Figure 1

    Figure 2

  • Hi Pengyu,

    Could you please share your schematic and capture the primary low side Vds and transformer primary winding current in the same waveform for analysis . you can remove the SR current while still keep the Vgs. 

    Thanks.

  • Transformer leakage inductance is 2.8uH, magnetizing inductance is 135uH. The above situation is that the clamping capacitor is 220nF
    Figure 1 shows the clamp capacitor voltage and the secondary SR current waveforms. It can be seen that the clamp capacitor voltage fluctuates 30V and is asymmetric.

    Figure 1

    Figure 2 shows the waveforms of Vgs(SR) and Isec after changing the clamping capacitor to 440nF. It can be seen that Vgs(SR) returns to normal, and the Isec waveform is symmetrical, but ZCS is not implemented, so the voltage spike of the synchronous rectifier is very large.

    Figure 2

    Figure 3 shows the waveforms of Vclamp and Isec after changing the clamping capacitor to 440nF. It can be seen that the Vclamp waveform is symmetrical and the Vclamp voltage fluctuation is only 6V.

    Figure 3

    Figure 4 is a schematic diagram

    Figure 4

    Confusing points:

    1. Is the SR turned off prematurely because the clamping capacitor is too small?
    2. If the clamping capacitance is changed to 440nF, the leakage inductance needs to be changed to 1uH to realize the ZCS of SR. I don't know if the magnetizing inductance is 135uH, can the leakage inductance reach 1uH?

  • This is a clear schematic

  • Hi PengYu,

    That is right , usually , we recommend 0.22uF * 3PCS on primary side , special the switching frequency at low line full load is around 140khz .

    Non-ZCS turn off of SR is acceptable for ACF , actually it has some benefit for improve the efficiency since the resonant current will contribute to achieving  the  ZVS turn on of primary FET ,while reduce the needed negative current .  the drawback of non-ZCS turn off of SR is you have mentioned , a little larger Vds spike . but that is can be solved by using a higher Vds  SR FET, basically for 20V design , we recommend 150V SR MOSFET. 

  • Thanks for the patience of the experts.
    As shown in Figure 1, Vin=120VDC, the peak of Vds(SR) reaches 95V, the withstand voltage of the synchronous rectifier is 100V, the stable value of Vds(SR) is 38V, and the voltage fluctuates by 60V. It can be seen that when Vin=380VDC, the voltage spike of SR may exceed 150V.

    Figure 1

    Because the current flowing through the primary magnetizing inductance crosses zero, the realization of the zero voltage turn-on of the lower tube is mainly through the energy of the magnetizing inductance to discharge the parasitic capacitance of the lower tube, so as to realize the lower tube ZVS, and the reduction of leakage inductance should have little effect.
    If the leakage inductance of the transformer can be reduced from 2.8uH to less than 1.5uH (though I don’t know if it can be achieved, try to reduce the leakage inductance as much as possible), so that the turn-off loss of the synchronous rectifier tube is reduced, and the voltage spike is also reduced. Even though ZVS can still be achieved (simulation can prove), I don’t know if this is desirable.

  • Hi PengYu,

    The waveforms shows unstable resonance current still happens in the power stage, you may need to further increase primary clamp capacitance. the slight non-zcs turn off will benefit for the efficiency . but severe non-zcs turn off will lead to excess voltage stress on SR FET.  low leakage inductance will benefits for both efficiency and voltage stress. basically , ~1% * Lm leakage inductance can be achieved on planar transformer, for bobbin transformer it should extend to ~2% .

    Thanks.