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TPS1663: "Fault event" condition in PGOOD pin for TPS16632

Part Number: TPS1663

HI  

We are using TPS16632 in our design and our customer have a question on PGOOD signal

according to DataSheet 9.3.8 ( pls ref to below figures), it says that:

      "PGOOD goes low when the internal FET is turned OFF during a fault event or when #SHDN is pulled low"

Actually there are no detail description on detection condition/ criteria for the * Fault event" ( Like OVP or OCP protection? the trigger condition is ?Volt or ? Amp? )

can you help to advice the detail ?

thank you

steven  

  • Hi Steven,

    As you see below, the PGOOD logic is controlled by logic signals of GATE (HS_FET), UVLOb, SHDNb.

    • UVLOb, SHDNb are externally controlled by the user
    • The logic output of GATE (HS_FET) is again depends on the external settings of UVLO, OVP, current limit threshold. When ever the system hits any of these fault thresholds, GATE (HS_FET)  goes LOW and asserts PGOOD to LOW.