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TPS7H1101A-SP: 3 questions

Part Number: TPS7H1101A-SP

Hello,

I have 3 urgent questions on the TPS7H1101A-SP.

 

1  Is it ok to connect the CS pin directly to VIN instead of using a pullup?  We do not need to measure current.

 

2  Our load is less than 100ma.  Given this light load, do you see any issues with having capacitance on Vin of 2uF, and capacitance on VOUT of 2uF.  Can this be accurately tested with the TINA model?

 

3  Can you share what the gain bandwidth is for this LDO?  We may have transients on the input and we are concerned about the LDO regulating fast enough.  Can this be accurately tested with the TINA model?

 

Thanks,

Adam

  • Adam,

    I can give an and for the first 2 questions.  

    1) Yes, this is acceptable and does not cause any issues for device.

    2) This is outside of our recommended input capacitance.  The range of 10uF to 220uF was used to set of boundary conditions for design and characterization of the device.  Using a value outside this range may be completely stable, however it should be evaluated for stability with the hardware.   The pspice model was developed with the same methodology, and capacitance values outside of the boundary conditions may not match actual performance.

    3) I need to get some feedback from the design team on this.    I will reply back with more information.

    Regards,

    Wade

  • Adam,

    Feedback from design is LDO bandwidth is in the neighborhood of 150 kHz.  This can be significantly influenced by the close loop load and output capacitance.

    If this answers your question, please click "This Resolved My Issue"
    Regards,
    Wade