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TPSM82864A: Schematic/Layout

Part Number: TPSM82864A

Hi Team, 

Couple of questions regarding the schematic and layout. 

If we put in a feedback resistor circuit, do we need to connect it to the AGND in the layout? That is, does pin 17 need to be connected to pin 18 in layout? Likewise with the VSET pin 3? 

If PG is tied to 3.3V, it will take approx 34us or 68us to turn ont? (confirming from the datasheet: The PG pin has a 34-μs delay time on the falling edge and a 34-μs delay before PG goes high)

Thank you,

Delaney

  • Hi Delaney,

    Thanks for designing with this new device!

    Yes, all the GND pins need to be tied together in the layout.  This is shown in figure 11-1.

    Yes, VSET must be tied high or low to set the adjustable voltage configuration.  This is written on page 3.

    It's a 34 usec delay for each edge, rising or falling.  You don't need to double the time.

    Thanks,

    Chris