No. Unlike analog devices, RESET pin of the UCD90xxx resets its digital core abruptly. All GPIO pins immediately enter a high-impedance state, and all FPWM pins immediately enter a drive-low state. There is no sequencing. Also, upon releasing the RESET pin, the device is subject to at least a 20-ms initialization time before it starts to function.
The correct method to sequence off rails is to use the CONTROL pin. A delay and dependency configuration of each rail is observed, and there is no initialization time delay at the following sequence on.
The datasheet recommends pulling the RESET pin to V33D with a local decoupling capacitor. This way, the RESET pin voltage ramps up with V33D. Also, though unnecessary, you can opt to keep the RESET pin low by an external source until after the V33D supply has completed ramping up. However, avoid pulling RESET pin low once the device is in operation. Glitch is not allowed on the RESET pin.
For more FAQ please check the following document.
UCD90xxx Family Frequently Asked Questions and Answers
UCD9090 UCD9090A UCD90120 UCD90120A UCD90124 UCD90124A UCD90160 UCD90160A UCD90240 UCD90320 UCD90320U